EPM3512ATC144 vs EPM3128ATC144-10 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512ATC144 sa pamamagitan ng Altera at EPM3128ATC144-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3512ATC144 EPM3128ATC144-10
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Aktibo
Family MAX 3000A MAX 3000A
Macrocells 512 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 212 —
Packhaging TQFP-144 (20x20 mm) 144-pin TQFP (TQ144)
Core Supply Voltage 3.3 V —
Programming Technology EEPROM (in-system programmable) —
JTAG Interface IEEE Std. 1149.1 (4-pin) —
Maximum Frequency 116 MHz —
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns] 10 ns (speed grade -10)
Product Terms per Macrocell 32 (expandable) —
I/O Standards LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant —
Temperature na Operasyon 0C to +70C (commercial) 0C to +70C (commercial)
Uri ng Pagpapasok Surface Mount Surface Mount
Level ng MSL 3 —
Tindminan RoHS Compliant (lead-free suffix variants available) Compliant
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 128
User I/Os — 96
Usable Gates — 2,500 (typical)
Logic Elements / LABs — 4 Logic Array Blocks
Counter Frequency (fCNT) — Up to 227.3 MHz
Supply Voltage (VCCINT) — 3.3 V
MultiVolt I/O Interface — 1.5V / 1.8V / 2.5V / 3.3V
In-System Programmability — IEEE Std. 1532 compliant
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG)
Configuration Memory — EEPROM (non-volatile, instant-on)
Lead-Free — Yes

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