EPM3512ATC144 vs EPM3256ATC144-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512ATC144 sa pamamagitan ng Altera at EPM3256ATC144-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3256ATC144-10 - 256-Macrocell CPLD, 10ns, 144-TQFP | Intel / Altera
EPM3256ATC144-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM3512ATC144 | EPM3256ATC144-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 3000A | — |
| Macrocells | 512 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| Packhaging | TQFP-144 (20x20 mm) | 144-pin TQFP (20x20 mm) |
| Core Supply Voltage | 3.3 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 (4-pin) | — |
| Maximum Frequency | 116 MHz | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | — |
| Product Terms per Macrocell | 32 (expandable) | — |
| I/O Standards | LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 | — |
| Tindminan RoHS | Compliant (lead-free suffix variants available) | Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | MAX 3000A |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Programmable Type | — | In-System Programmable (EEPROM-based, IEEE 1532) |
| Usable Gates | — | 5,000 |
| Number of I/O Pins | — | 116 |
| Propagation Delay (tpd max) | — | 10 ns |
| Counter Frequency (max) | — | 95.2 MHz |
| Core Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Logic Level Support | — | MultiVolt - 5.0 V, 3.3 V, 2.5 V |
| JTAG / Boundary Scan | — | Yes (IEEE 1149.1) |
| Process Technology | — | CMOS EEPROM |