EPM5032DC vs EPM5032DC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DC sa pamamagitan ng Altera at EPM5032DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM5032DC | EPM5032DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | UV-erasable EPLD (PAL-type CMOS) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 1 | — |
| Packhaging | DIP-24 (ceramic, windowed) | CERDIP-28 (windowed, through-hole) |
| Speed Grade | DC (commercial) | — |
| Temperature na Operasyon | 0C to +70C | 0C to +70C (commercial) |
| Technology | Bipolar EPROM, UV-erasable | — |
| Programmable Logic Elements | AND array + fixed OR array per macrocell | — |
| Configuration Memory | EPROM (UV-erasable via package window) | — |
| Uri ng Pagpapasok | Through-hole (DIP) | Through-Hole (DIP) |
| Bilang ng Pin | 24 | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programming Tool | Altera MAX+PLUS II / A+PLUS legacy | — |
| Katayuan ng Lifecycle | Obsolete (mature legacy) | — |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |
| Lead-Free | — | unknown |