EPM5032PC-15 vs EPM5032DC-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032PC-15 sa pamamagitan ng Altera at EPM5032DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5032PC-15 EPM5032DC-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family MAX 5000 —
Device Type EPLD (Erasable PLD) UV-erasable EPLD (PAL-type CMOS)
Macro Cells 32 —
Usable Gates 600 600
Logic Elements / LABs 1 LAB (4 macrocells per group) —
Propagation Delay (tPD) 15 ns 15 ns
Maximum Internal Frequency 76.9 MHz (some sources list 83.3 MHz) —
Operating Voltage (VCC) 5 V (typ.) —
Technology Node 0.8 micron CMOS —
Configuration Memory UV-Erasable EPROM —
Dedicated Inputs 7 —
Bidirectional I/O Pins 16 —
Total Array Inputs 24 —
Packhaging 28-pin PDIP (PC suffix = windowed CerDIP) CERDIP-28 (windowed, through-hole)
Pin/Package Suffix PC = Windowed Ceramic DIP —
Speed Grade 15 (15 ns tPD) —
Temperature na Operasyon 0C to +70C (commercial) 0C to +70C (commercial)
Programming Tool Altera Logic Programmer + MAX+plus II —
Tindminan RoHS Non-compliant (CerDIP window, contains Be) [DATA_NEEDED: RoHS status]
Lead-Free No unknown
Uri ng Pagpapasok Through-Hole (DIP) Through-Hole (DIP)
Family — MAX 5000
Macrocells — 32
Maximum Toggle Frequency (fMAX) — 83.3 MHz
Supply Voltage (VCC) — 5 V (nominal)
Logic Family — CMOS, TTL-compatible I/O
Programmable Pins — 16 bidirectional I/O + 4 dedicated input = 20
Total Package Pins — 28
Erasure Method — UV light through ceramic quartz window
Process Technology — CMOS

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