EPM5130QC-1 vs EPM5130WM883B-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5130QC-1 sa pamamagitan ng Altera at EPM5130WM883B-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5130QC-1 | EPM5130WM883B-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Logic Cells / Macrocells | 128 macrocells | — |
| Usable Gates (marketing) | 5130 gates | — |
| Speed Grade | -1 | — |
| Packhaging | PQFP-100 (windowed ceramic) | [DATA_NEEDED: exact package code] |
| Terminal Pitch | 0.635 mm | — |
| Process Technology | CMOS | CMOS |
| Configuration Memory | UV-Erasable EPROM | — |
| Volte ng Pagbibigay | 5 V (single) | — |
| Temperature na Operasyon | Commercial (0 C to +70 C) | [DATA_NEEDED: military temperature range] |
| Programmable Polarity | Yes (per macrocell) | — |
| Boundary Scan / JTAG | Per MAX 5000 family | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | unknown |
| Device Type | — | UV PLD (UV-erasable programmable logic device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD, -2 grade) | — | 45 ns |
| Propagation Delay (tPD, -1 grade) | — | 55 ns (EPM5130WM883B base) |
| Dedicated Inputs | — | 19 |
| User I/O Pins | — | 48 |
| Total Inputs | — | 68 |
| Total Outputs | — | 48 |
| Interconnect | — | Programmable Interconnect Array (PIA) - 8 LAB channels |
| External Clock Inputs | — | 1 |
| Programming Method | — | UV-erasable (windowed package) |
| Development Tool | — | MAX+PLUS II |
| Military Processing | — | MIL-STD-883 Class B (883B suffix) |