EPM5192AJC-15 vs EPM5192AJC84-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192AJC-15 sa pamamagitan ng Intel at EPM5192AJC84-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192AJC-15 EPM5192AJC84-15
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Macrocells 192 192
Logic Capacity 100% connectivity, sum-of-products PLA architecture —
Pin-to-Pin Delay (tPD) 15 ns —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V (single supply)
Temperature na Operasyon 0C to +70C (commercial) [DATA_NEEDED: commercial/industrial/military grade]
Packhaging 84-pin PLCC (J-lead, ceramic, non-windowed) 84-pin PLCC (J84C) windowed ceramic
Uri ng Pagpapasok Surface Mount Surface Mount
Programmability UV-erasable (windowed variant) / One-Time-Programmable —
Toolchain MAX+PLUS II —
Tindminan RoHS [DATA_NEEDED: RoHS compliance] Non-compliant (contains Pb, ceramic windowed package)
Bilang ng Pin 84 —
User I/O Pins [DATA_NEEDED: user I/O count] —
Speed Grades Available -15, -20, -25 (this part: -15) —
Configuration Memory EPROM (UV-erasable) —
Propagation Delay (tpd) — 15 ns
Maximum Clock Frequency (fMAX) — 83.3 MHz
Technology — CMOS, UV-erasable EPROM
Programming Method — UV-erase + EPROM programming (windowed package)
Logic Blocks — 16 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: user I/O count]
Process Technology — CMOS EPROM

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita