EPM5192GC-1 vs EPM5192GM Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GC-1 sa pamamagitan ng Altera at EPM5192GM sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192GC-1 EPM5192GM
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 (Classic) —
Logic Type CPLD (Complex Programmable Logic Device) —
Macrocells 192 —
Usable Gates 3,750 3,750
Logic Array Blocks (LABs) 12 —
Dedicated Inputs 7 —
User I/O Pins 64 —
Maximum Propagation Delay (tPD) 40 ns —
Maximum Frequency (fMAX) 62.5 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Process Technology CMOS, UV-erasable / OTP —
Packhaging 100-pin Ceramic PGA (GC) CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Uri ng Pagpapasok Through-Hole (PGA) Through-Hole (PGA)
Configuration Method UV-Erase / One-Time Programmable —
Interconnect Peripheral Interconnect Array (PIA) —
Temperature na Operasyon [DATA_NEEDED: operating temperature grade] [DATA_NEEDED: commercial/industrial/military grade]
Tindminan RoHS [DATA_NEEDED: RoHS status] Non-compliant (contains lead in ceramic PGA)
Product Family — MAX 5000
Device Type — UV Erasable Programmable Logic Device (PLD)
Technology — CMOS
Number of Macrocells — 192
Pin-to-Pin Delay (tPD) — 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) — up to 76.9 MHz
Propagation Delay (tPD, this part) — 55 ns
Erasure Method — UV (windowed ceramic package)
Volte ng Pagbibigay — [DATA_NEEDED: typical VCC range]
Maximum User I/O — [DATA_NEEDED: exact I/O count for CPGA-84]
Process Node — [DATA_NEEDED: CMOS process geometry]
Programming Interface — JTAG-compatible (per MAX 5000 family)

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