EPM5192GI vs EPM5130GI Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GI sa pamamagitan ng Altera at EPM5130GI sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GI | EPM5130GI |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Technology | CMOS EPROM (UV-erasable / OTP) | — |
| Macrocells | 192 | 128 |
| Logic Array Blocks (LABs) | 16 (12 macrocells per LAB) | 8 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 19 |
| Total Inputs | 72 | 68 |
| Propagation Delay (tPD) | 55 ns | 55 ns |
| Maximum Internal Frequency (fCNT) | 33.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Temperature na Operasyon | -40 C to +85 C (Industrial) | -40C to +85C (industrial) |
| Package Type | 84-pin PGA (Pin Grid Array), ceramic with quartz window | — |
| Programmable | UV-erasable (windowed) and OTP variants | — |
| Uri ng Pagpapasok | Through-hole (PGA) | — |
| Tindminan RoHS | [DATA_NEEDED: not confirmed in verified web data] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Architecture | — | EPLD (Erasable Programmable Logic Device), UV-erasable |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| I/O Pins | — | 48 |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| External Clock Pins | — | 1 |
| Process Technology | — | CMOS |
| Volte ng Pagbibigay | — | 5 V |
| Packhaging | — | Ceramic Pin Grid Array (PGA), windowed |
| Programming Method | — | UV erasure + EPROM programming |