EPM5192LC84 vs EPM5192LC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC84 sa pamamagitan ng Altera at EPM5192LC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC84 | EPM5192LC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Packhaging | LCC-84 (PQCC84, MS-018) | — |
| Bilang ng Pin | 84 | — |
| Uri ng Pagpapasok | Surface Mount (Socket-compatible) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC range] | 5 V nominal (4.75 V to 5.25 V) |
| User I/O | [DATA_NEEDED: max user I/O count] | 64 |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| Tindminan RoHS | unknown | Non-compliant (ceramic LDCC with Pb-bearing terminations) |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | EPLD / CPLD |
| Macrocells | — | 192 |
| Logic Gates | — | 3750 (typical usable) |
| Dedicated Inputs | — | 7 |
| Bilang ng Pins | — | 84 |
| Package Type | — | LDCC (Leaded Ceramic Chip Carrier), plastic windowless |
| Propagation Delay | — | 25 ns |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Technology | — | CMOS, UV-erasable / OTP EPROM cell |
| Programmable Memory | — | EPROM (one-time or UV-erasable) |
| Speed Grade | — | -1 |