EPM570T144C5 vs EPM570T144C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570T144C5 sa pamamagitan ng Intel at EPM570T144C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570T144C5 | EPM570T144C5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 440 | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| User I/Os | 116 | 116 |
| Total Package Pins | 144 | — |
| Packhaging / Kaso | 144-TQFP (TQFP-144) | — |
| Core Supply Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal voltage] | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V (multi-voltage I/O supported) | — |
| Configuration Memory | On-chip flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1), ISP | IEEE 1149.1 JTAG (in-system programmable) |
| Process Technology | 0.18 µm CMOS | 0.18 µm 6-layer-metal flash |
| Temperature na Operasyon | Commercial (0 °C to +85 °C) | 0 °C to +85 °C (commercial, C5 grade) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Series | — | MAX II Device |
| Logic Elements (LEs) | — | 570 |
| Macrocells | — | 440 |
| Internal User Flash Memory | — | 8 Kbit |
| Global Clocks | — | 4 |
| Core Voltage (VCCINT) | — | 1.8 V (typical, internally regulated) |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) |
| Maximum User I/O Pins | — | 116 |
| Propagation Delay (tPD) | — | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) |
| Maximum Frequency (fMAX) | — | 201.1 MHz |
| Packhaging | — | TQFP-144 (20 × 20 mm, 0.5 mm pitch) |
| Configuration Storage | — | On-chip non-volatile flash |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) |
| Lead-Free | — | Yes |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |
| Design Software | — | Intel Quartus II (MAX II device support) |