EPM7096LC84-15 vs EPM7128SLC84-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7096LC84-15 sa pamamagitan ng Altera at EPM7128SLC84-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM7096LC84-15 | EPM7128SLC84-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | MAX 7000 | MAX 7000S |
| Series | MAX 7000 (second-generation MAX architecture) | — |
| Macro Cells | 96 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1,800 | 2,500 |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Programmable Type | EE PLD (in-system programmable via JTAG) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | JTAG (IEEE Std. 1149.1), in-system programmable |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Packhaging / Kaso | 84-PLCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount / Socketed (PLCC-84 socket) |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Non-RoHS (legacy 5V part) |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macrocells | — | 128 |
| User I/Os | — | 68 (in 84-PLCC) |
| Packhaging | — | 84-Pin PLCC (J-Lead, J84) |
| Speed Grade | — | -15 (15 ns pin-to-pin delay) |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Internal Frequency (fMAX) | — | 76.9 MHz |
| Logic Family / Process | — | CMOS, 5V, EEPROM |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Standard Support | — | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) |
| Configuration Memory | — | Non-volatile EEPROM (instant-on, no boot PROM) |