EPM7096LC84-7 vs EPM7096LC68-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7096LC84-7 sa pamamagitan ng Intel at EPM7096LC68-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7096LC84-7 | EPM7096LC68-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 | 52 |
| Speed Grade (tPD) | 7.5 ns | — |
| Packhaging | 84-pin PLCC (Plastic Leaded Chip Carrier) | PLCC-68 (LC68) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC socket compatible) |
| Volte ng Pagbibigay | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| Temperature na Operasyon | 0C to +70C (commercial, LC suffix) | 0C to +70C (commercial) |
| Tindminan RoHS | Non-compliant (original Altera product, leaded PLCC package) | — |
| Katayuan ng Lifecycle | Obsolete - PCN/PDN issued by Intel | — |
| Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programmable Technology | — | EEPROM (second-generation MAX architecture) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Logic Gates (typical) | — | 1800 gates |
| Memory Bits | — | Non-volatile configuration, 100 erase/program cycles per macrocell |
| Lead-Free / RoHS | — | Compliant per Altera product page |
| Programming Tool Support | — | Altera MAX+PLUS II, Quartus II; ByteBlaster / ByteBlasterMV |