EPM7096LC84-7 vs EPM7096LC68-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7096LC84-7 sa pamamagitan ng Intel at EPM7096LC68-7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7096LC84-7 | EPM7096LC68-7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 | 52 |
| Speed Grade (tPD) | 7.5 ns | — |
| Packhaging | 84-pin PLCC (Plastic Leaded Chip Carrier) | 68-pin J-Lead PLCC (LC68) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Volte ng Pagbibigay | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | EEPROM, second-generation MAX |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| Temperature na Operasyon | 0C to +70C (commercial, LC suffix) | -40C to +85C (industrial, typical) |
| Tindminan RoHS | Non-compliant (original Altera product, leaded PLCC package) | Non-compliant (legacy 5V PLCC) |
| Katayuan ng Lifecycle | Obsolete - PCN/PDN issued by Intel | — |
| Device Type | — | CPLD (EEPROM-based) |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Global Clock Pins | — | 6 |
| Process Technology | — | CMOS EEPROM |