EPM7128SLC8410 vs EPM7128ELC84-12 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128SLC8410 sa pamamagitan ng Intel at EPM7128ELC84-12 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128SLC8410 | EPM7128ELC84-12 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000S | MAX 7000 (MAX 7000E series) |
| Macrocells | 128 | 128 |
| Logic Elements / Gates | 2500 usable gates | — |
| User I/O Pins | 68 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 7 ns | — |
| Maximum Operating Frequency | 125 MHz (counter) | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| I/O Voltage (MultiVolt) | 2.5 V / 3.3 V / 5.0 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan | — |
| Packhaging | 84-pin PLCC (J-lead) | 84-pin PLCC (J-Lead, QCCJ) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount (PLCC socket or direct solder) | Surface Mount (PLCC socket compatible) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - not stated in verified data] | Non-compliant (legacy 5V part, SnPb finish) |
| Logic Family | — | CMOS, EEPROM-based |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 84 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Bilang ng Pin | — | 84 |