EPM7128STC100-15N vs EPM7128STC100-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128STC100-15N sa pamamagitan ng Intel at EPM7128STC100-7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7128STC100-15N - 128-Macro Cell CPLD, 15ns, 100-TQFP | Intel / Altera
EPM7128STC100-15N ObsoletePagsanggunian na paghahambing
| Parametro | EPM7128STC100-15N | EPM7128STC100-7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000S | — |
| Usable Gates | 2,500 | 2,500 |
| Macro Cells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 |
| Maximum User I/O | 84 | — |
| Pin-to-Pin Logic Delay (tPD) | 15 ns (-15 speed grade) | — |
| Maximum Internal Frequency | 76.9 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Supply Voltage (VCCIO) | 3.3 V or 5 V (per bank) | — |
| Technology | CMOS EEPROM, in-system programmable | — |
| Packhaging | 100-pin TQFP | 100-Pin TQFP (TQFP-100) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| JTAG (IEEE 1149.1) | Yes - in-system programming | — |
| Output Options | Totem-pole or open-drain (per pin) | — |
| Dedicated Inputs | 4 global inputs | — |
| Tindminan RoHS | Non-RoHS (legacy SnPb finish typical) | [DATA_NEEDED: rohs status] |
| Katayuan ng Lifecycle | Obsolete (PDN effective 2017-06-01) | — |
| Series | — | MAX 7000S |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 84 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| Logic Family | — | CMOS |
| Programmable Pin Count | — | 100 |
| Uri ng Pagpapasok | — | Surface Mount |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| Configuration Memory | — | EEPROM (non-volatile) |