EPM7160SLC84-10 vs EPM7128SLC84-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7160SLC84-10 sa pamamagitan ng Altera at EPM7128SLC84-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7160SLC84-10 | EPM7128SLC84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 160 | 128 |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum User I/O Pins | 64 | — |
| Usable Gates | 3,200 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | 125 MHz |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, 5.0 V) | — |
| Technology | EEPROM-based CMOS | — |
| Packhaging | 84-Pin PLCC (J-Lead) | PLCC-84 (J-lead) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (J-bend) |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| JTAG Boundary Scan | Yes (IEEE Std. 1149.1 compliant) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (contains lead in PLCC) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Gates | — | 2500 |
| User I/Os | — | 68 |
| Total Package Pins | — | 84 |
| Propagation Delay (tpd) | — | 10 ns |
| Internal Frequency | — | 250 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |