EPM7192EGM160-15 vs EPM7192EQC160-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7192EGM160-15 sa pamamagitan ng Altera at EPM7192EQC160-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7192EGM160-15 | EPM7192EQC160-20 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 7000 | — |
| Sub-family | MAX 7000E | — |
| Device | EPM7192E | — |
| Macrocells | 192 | — |
| Usable Gates | 3750 | — |
| Logic Array Blocks (LABs) | 12 (16 macrocells each) | — |
| User I/O Pins | 124 | — |
| Packhaging | 160-pin PGA (Pin Grid Array), ceramic | — |
| Pin-to-Pin Logic Delay (tPD) | 15 ns | — |
| Supply Voltage (Core) | 5 V ±5% | — |
| I/O Voltage | 3.3 V or 5 V configurable | — |
| Technology | CMOS EEPROM (0.5 µm) | — |
| Programming Interface | JTAG (ByteBlaster / BitBlaster) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Uri ng Pagpapasok | Through-hole (PGA socket) | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - non-RoHS era part] |
| Series | — | MAX 7000 |
| Programmable Type | — | EE PLD (EEPROM-based) |
| Number of Macrocells | — | 192 |
| Number of Logic Array Blocks | — | 4 |
| Number of User I/O Pins | — | 124 (per package), 36 (per data source variant description) |
| Delay Time (tPD) | — | 20 ns |
| Internal Counter Frequency (fCNT) | — | 100 MHz typical |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Packhaging / Kaso | — | 160-BQFP / 160-PQFP (28x28 mm) |
| In-System Programmable (ISP) | — | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) |
| Programmable Security Bit | — | Yes |
| Power-Saving Mode | — | Yes, programmable per macrocell |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |