EPM7256SQC208-7 vs EPM7256SQC208-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM7256SQC208-7 sa pamamagitan ng Altera at EPM7256SQC208-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM7256SQC208-7 EPM7256SQC208-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Device Family MAX 7000S (EPM7256S) —
Macrocells 256 256
Usable Gates 5,000 5000
User I/O Pins 164 164
Propagation Delay (tPD) 7.5 ns —
Maximum Operating Frequency (fMAX) 128.2 MHz —
Supply Voltage (VCC) 5.0 V —
Configuration Technology EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Packhaging 208-pin PQFP (28 x 28 mm, 0.5 mm pitch) 208-pin PQFP (28x28 mm)
Uri ng Pagpapasok Surface Mount Surface Mount
Hanay ng Temperature na Operasyon Commercial (0C to +70C) 0 C to +70 C (Commercial)
Minimum DC Input Voltage -0.5 V —
Input Undershoot Tolerance -2.0 V for <100 mA, <20 ns —
Speed Grade -7 (7.5 ns) —
Tindminan RoHS [DATA_NEEDED: RoHS status] Contains lead / RoHS non-compliant (per third-party listing)
Level ng MSL [DATA_NEEDED: MSL level] —
Logic Levels 5.0 V CMOS/TTL compatible —
Family — MAX 7000S
Series — EPM7256
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 16
Pin-to-Pin Delay (tPD) — 15 ns
Supply Voltage (VCCINT) — 4.75 V to 5.25 V
Programmable Power Mode — Yes (per-macrocell turbo-bit)
JTAG (IEEE 1149.1) Boundary-Scan — Yes
In-System Programmability (ISP) — Yes
Configuration Memory — EEPROM (non-volatile)
Lead-Free Status — Contains lead

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