EPM9560ARC208-10 vs EPM9560ARC208-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC208-10 sa pamamagitan ng Intel at EPM9560ARC208-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARC208-10 | EPM9560ARC208-10N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 9000A (Multiple Array MatriX) | — |
| Programmable Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 gates | 12,000 |
| Macrocells | 560 macrocells | 560 |
| Logic Array Blocks | 35 LABs | — |
| User I/O Pins | 153 I/O | 153 |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | — |
| Internal Frequency | 144.9 MHz | — |
| Volte ng Pagbibigay | 5.0 V | 5 V |
| Logic Family | CMOS | — |
| Configuration Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan (ISP) | — |
| Temperature na Operasyon | 0 C to +70 C (commercial) | 0 C to +70 C (commercial) |
| Packhaging | 208-pin RQFP (PowerQuad Flat Pack) with exposed pad | 208-pin RQFP (PowerQuad II) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| Bilang ng Pin | 208 pins | — |
| Family | — | MAX 9000 |
| Pin-to-Pin Delay | — | 10 ns |
| Internal Counter Frequency | — | 144.9 MHz |
| Technology | — | CMOS EEPROM |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (JTAG ISP) |
| Logic Array Blocks (LABs) | — | 20 |
| Speed Grade | — | -10 |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |