EPM9560ARC208-10 vs EPM9560ARC208-10N Comparison
Detailed side-by-side comparison of EPM9560ARC208-10 by Intel and EPM9560ARC208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560ARC208-10 | EPM9560ARC208-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000A (Multiple Array MatriX) | — |
| Programmable Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 gates | 12,000 |
| Macrocells | 560 macrocells | 560 |
| Logic Array Blocks | 35 LABs | — |
| User I/O Pins | 153 I/O | 153 |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | — |
| Internal Frequency | 144.9 MHz | — |
| Supply Voltage | 5.0 V | 5 V |
| Logic Family | CMOS | — |
| Configuration Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan (ISP) | — |
| Operating Temperature | 0 C to +70 C (commercial) | 0 C to +70 C (commercial) |
| Package | 208-pin RQFP (PowerQuad Flat Pack) with exposed pad | 208-pin RQFP (PowerQuad II) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (N suffix) |
| Pin Count | 208 pins | — |
| Family | — | MAX 9000 |
| Pin-to-Pin Delay | — | 10 ns |
| Internal Counter Frequency | — | 144.9 MHz |
| Technology | — | CMOS EEPROM |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (JTAG ISP) |
| Logic Array Blocks (LABs) | — | 20 |
| Speed Grade | — | -10 |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| MSL Level | — | [DATA_NEEDED: MSL level] |