EPM9560ARC304-10F vs EPM9560GC280-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARC304-10F sa pamamagitan ng Altera at EPM9560GC280-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560ARC304-10F | EPM9560GC280-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Device Family | MAX 9000A | — |
| Programmable Type | In System Programmable (ISP) | — |
| Number of Macrocells | 560 | — |
| Number of Logic Elements/Blocks | 35 LABs | — |
| Number of Gates | 12000 | — |
| Number of I/O | 216 | — |
| Maximum Delay Time (tPD) | 10 ns | — |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | — |
| Temperature na Operasyon | 0 C to +70 C (commercial) | — |
| Packhaging | 304-pin RQFP (PowerQuad II) | — |
| Package Code | FQFP | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| Uri ng Pagpapasok | Surface Mount | Through-Hole |
| Configuration Memory | EEPROM (non-volatile) | — |
| JTAG Support | IEEE 1149.1 (ISP) | — |
| Tindminan RoHS | RoHS | Non-compliant (ceramic CPGA, contains lead) |
| Speed Grade | -10 (10 ns) | — |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD (CMOS EEPROM-based CPLD) |
| Macro Cells | — | 560 |
| Typical Gates | — | 12,000 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns (speed grade -15) |
| Propagation Delay (alternate datasheet figure) | — | 16.6 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Package Type | — | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Programmability | — | In-System Programmable (ISP) via JTAG IEEE 1149.1 |
| Technology | — | CMOS EEPROM, 0.5 um process (MAX third-gen) |
| Architecture | — | Multiple Array MatriX (MAX) |
| Katayuan ng Lifecycle | — | Obsolete (legacy Altera MAX 9000 family) |