EPM9560ARI240-10 vs EPM9560GC280-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560ARI240-10 sa pamamagitan ng Altera at EPM9560GC280-15N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560ARI240-10 | EPM9560GC280-15N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 (typical) |
| Macro Cells | 560 | — |
| User I/O Pins | 191 | — |
| Packhaging | 240-pin RQFP (PowerQuad Flat Pack) | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Pin-to-Pin Propagation Delay | 10 ns | — |
| Internal Frequency | 144.9 MHz | — |
| Volte ng Pagbibigay | 5.0 V | — |
| Technology | CMOS, EEPROM-based configuration | — |
| Hanay ng Temperature na Operasyon | -40 C to +85 C (industrial) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Logic Architecture | Multiple Array MatriX (MAX) with global interconnect array | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Number of Terminals | 240 | — |
| Terminal Form | Gull Wing | PIN/PEG |
| Device Family | — | MAX 9000 |
| Product Type | — | EE PLD / CPLD |
| Macrocell Count | — | 560 |
| Propagation Delay (tPD) | — | 16.6 ns |
| Maksimum na Taktiko ng Oras | — | 117.6 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Maximum Supply Voltage | — | 5.25 V |
| Logic Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (5.0-V ISP via JTAG) |
| Boundary-Scan (JTAG) | — | IEEE Std. 1149.1 compliant |
| Package Code | — | PGA / CPGA280 |
| Operating Temperature Grade | — | Commercial |
| Architecture | — | Multiple Array MatriX (MAX) 3rd generation |