EPM9560RC208-7 vs EPM9560RC208-20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-7 sa pamamagitan ng Altera at EPM9560RC208-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560RC208-7 EPM9560RC208-20
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family MAX 9000 —
Device Type EPLD / CPLD —
Usable Gates 560 12,000
Macrocells 16 560
Logic Array Blocks (LABs) 4 —
User I/O Pins 208 153
Pin-to-Pin Delay (tPD) 7 ns (speed grade -7) 20 ns
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX value] —
Supply Voltage (VCCINT) 5.0 V —
Supply Voltage (VCCIO) 5.0 V (TTL) or 3.3 V (LVCMOS with level translator) —
Process Technology 0.65 um CMOS EEPROM —
Configuration Memory Non-volatile on-chip EEPROM (no boot PROM required) —
Programming Interface JTAG (IEEE 1149.1) + Altera ISP —
Packhaging 208-pin Power Quad Flat Pack (RQFP-208) 208-pin RQFP (28x28 mm)
Temperature na Operasyon 0C to +70C (commercial) / -40C to +85C (industrial) 0C to +70C (commercial)
Output Drive Current 160 mA DC sink per pin —
Tindminan RoHS Compliant (ROHS3 per distributor listing) [DATA_NEEDED: RoHS status]
Device Family — MAX 9000 (EPM9560)
Logic Array Blocks — 35
Maksimum na Taktiko ng Oras — 100 MHz
Volte ng Pagbibigay — 5.0 V
Configuration Technology — EEPROM (non-volatile)
In-System Programmability — Yes, via IEEE Std. 1149.1 JTAG
Uri ng Pagpapasok — Surface Mount
I/O Standards — 5.0 V TTL/CMOS compatible
Flip-Flops — 772
Level ng MSL — [DATA_NEEDED: MSL level]

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