EPM9560RC210-20 vs EPM9560RI210-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC210-20 sa pamamagitan ng Altera at EPM9560RI210-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM9560RC210-20 EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPM9560RC210-20 EPM9560RI210-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili NRND
Family MAX 9000 MAX 9000 (EPM9560)
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 20
Packhaging RQFP-210 (Power Quad Flat Pack, 0.5mm pitch) 210-pin RQFP (PowerQuad)
Pin-to-Pin Delay (tPD) 20 ns 15 ns (-15 speed grade)
Clock-to-Output (tCO) 12 ns —
Maximum User I/O [DATA_NEEDED: 212 I/O per datasheet, package-dependent] —
Volte ng Pagbibigay 5 V —
Process Technology 0.65 um EEPROM —
In-System Programmability Yes (MAX+PLUS II flow) Yes (JTAG ISP)
Boundary-Scan (JTAG) IEEE Std 1149.1 compliant —
Temperature na Operasyon [DATA_NEEDED: commercial 0C to 70C typical; industrial variants exist] Industrial (-40C to +85C)
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS RoHS3 Compliant (per supplier listing) ROHS3 Compliant
Device Type — Complex Programmable Logic Device (CPLD)
User I/O Pins — 164
Supply Voltage (VCCINT) — 5.0 V
I/O Voltage (MultiVolt) — 3.3 V / 5.0 V compatible
Configuration Memory — EEPROM (non-volatile)
JTAG Boundary Scan — IEEE 1149.1 compliant
Level ng Sensitivity sa Asid ng Moisture (MSL) — 3 (168 Hours)
Manufacturer Standard Lead Time — 1-7 Days (distributor stock)

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