EPM9560RC28-15 vs EPM9560RC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC28-15 sa pamamagitan ng Altera at EPM9560RC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560RC-15 - 560-Macrocell MAX 9000 CPLD, 15ns, 240-RQFP | Altera / Intel
EPM9560RC-15 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM9560RC28-15 | EPM9560RC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | MAX 9000 | MAX 9000 |
| Logic Elements | 560 | — |
| Usable Gates | 6,000 | 12,000 |
| Macrocells | 212 | 560 |
| Logic Array Blocks (LABs) | 16 | 16 (40 macrocells each) |
| Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V (5.0 V nominal) |
| I/O Tolerance | 5.0 V (3.3 V with level shift) | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | Yes (5.0 V ISP via JTAG) |
| Configuration Memory | EEPROM (UV-erasable window on RC package) | — |
| Maximum User I/O (largest package) | 212 | — |
| Hanay ng Temperature na Operasyon | -40C to +85C (industrial) / military options | — |
| Packhaging | 28-pin ceramic windowed DIP (RC-28) | 240-pin RQFP (32x32 mm) |
| Uri ng Pagpapasok | Through-Hole (DIP) | Surface Mount |
| Tindminan RoHS | Non-compliant (ceramic windowed DIP, military/aerospace pedigree) | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 191 |
| Pin-to-Pin Delay (tPD1) | — | 15 ns |
| Temperature na Operasyon | — | 0 C to +70 C (commercial) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG (ISP) |
| Process Technology | — | CMOS EEPROM |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |