EPM9560RC304-10 vs EPM9560RC304-15C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-10 sa pamamagitan ng Intel at EPM9560RC304-15C sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-10 | EPM9560RC304-15C |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD / EPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 16000 | 12,000 |
| Logic Elements | 560 | — |
| Packhaging | RQFP-304 (RC) | 304-pin RQFP |
| Bilang ng Pin | 304 | — |
| Pin-to-Pin Propagation Delay | 12 ns | — |
| Speed Grade | -10 | — |
| Volte ng Pagbibigay | 5 V | 5.0 V |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (Commercial) |
| User I/O Pins | 304 (package-limited) | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Programming Method | JTAG in-system (ISP) | — |
| Process Technology | 0.65 µm CMOS EEPROM | CMOS EEPROM |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 Hours) | — |
| Tindminan RoHS | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins (maximum) | — | 212 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Program/Erase Endurance | — | 100 cycles minimum |