EPM9560RC304-15F vs EPM9560RI304-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-15F sa pamamagitan ng Altera at EPM9560RI304-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-15F | EPM9560RI304-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Device Family | MAX 9000 | MAX 9000 |
| Series | EPM9560 | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tpd) | 16.6 ns (max) | 11.4 ns (per digchip datasheet); 16.6 ns reported by MicrochipUSA |
| Maximum Internal Frequency | 117.6 MHz | 145 MHz |
| Core Supply Voltage | 5.0 V | — |
| User I/O Pins | 212 | — |
| Dedicated Inputs | 4 | 4 |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | — |
| Packhaging | RQFP-304 (304-pin Plastic QFP) | — |
| Programming Technology | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) | — |
| Architecture | Multiple Array MatriX (MAX) with PIA interconnect | Multiple Array MatriX (MAX) - EEPROM-based CPLD |
| Boundary Scan Test (BST) | Yes, JTAG-compliant | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 C to 70 C (commercial) |
| Process Technology | High-performance CMOS, EEPROM-based | 0.5 µm CMOS EEPROM |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status - not stated in source] | [DATA_NEEDED: RoHS status] |
| Flip-Flops | — | 772 |
| User I/Os | — | 212 (216 per some datasheets) |
| Total Terminals | — | 304 |
| Package Code | — | HFQFP / S-PQFP-G304 |
| Package Type | — | 304-pin RQFP (Quad Flat Pack, gull-wing) |
| Speed Grade | — | -15 |
| Supply Voltage (VCCINT/VCCIO) | — | 4.5 V to 5.5 V (5 V typical) |
| I/O Logic Levels | — | 3.3 V or 5 V configurable |
| Temperature Grade | — | Industrial (per Partstack listings) |
| Logic Family | — | CMOS |
| Programming | — | 5.0-V in-system programmable via JTAG (IEEE 1149.1) |