EPM9560RC304-2 vs EPM9560RC304C-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC304-2 sa pamamagitan ng Intel at EPM9560RC304C-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteAltera
EPM9560RC304C-3 - MAX 9000 CPLD, 560 Macrocells, 304-Pin RBGGA | Altera
EPM9560RC304C-3 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560RC304-2 | EPM9560RC304C-3 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | CPLD (EPLD) |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | — |
| Macrocells | [DATA_NEEDED: macrocell count] | — |
| User I/O Pins | 304 | 212 |
| Packhaging | 304-pin RQFP (RC) | RBGGA-304 (Ceramic Ball Grid Array) |
| Speed Grade | -2 | -3 (3 ns pin-to-pin, commercial) |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | IEEE 1149.1 boundary-scan |
| Temperature na Operasyon | Commercial (0C to +70C) | 0 C to +70 C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | unknown (legacy part, pre-RoHS era) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Macrocells (Logic Elements) | — | 560 |
| Bilang ng Pin | — | 304 |
| Volte ng Pagbibigay | — | 5 V |
| Programmability | — | In-system, non-volatile EEPROM |
| Logic Blocks | — | Logic Array Blocks (LABs) with PIA interconnect |