EPM9560RI208-10 vs EPM9560RI208-20N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RI208-10 sa pamamagitan ng Intel at EPM9560RI208-20N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RI208-10 | EPM9560RI208-20N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 144 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| User I/O Pins | 212 (typical for 208-RQFP package) | — |
| Packhaging | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40 °C to +85 °C (Industrial) | Industrial (-40C to +85C) |
| Programming Interface | IEEE 1149.1 (JTAG) / ISP | — |
| Configuration Memory | EEPROM, 100 erase/program cycles | — |
| Tindminan RoHS | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Device Family | — | MAX 9000 |
| Pin-to-Pin Delay | — | 20 ns (-20 speed grade) |
| Counter Speed | — | 100 MHz |
| Volte ng Pagbibigay | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Development Tool | — | MAX+PLUS II |
| Design Entry | — | Schematic, VHDL, Verilog HDL, AHDL |
| Packaging | — | Tray |
| Logic Architecture | — | Third-generation MAX (Multiple Array MatriX) |
| Fabrication Process | — | Advanced CMOS |