EPM9560WC208-20C vs EPM9560WI208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560WC208-20C sa pamamagitan ng Altera at EPM9560WI208-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560WC208-20C | EPM9560WI208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Device Family | MAX 9000 (EE PLD) | MAX 9000 |
| Series | EPM9560 | — |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | 16 |
| User I/O Pins | 149 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Maksimum na Taktiko ng Oras | [DATA_NEEDED: fMAX value not in verified data] | — |
| Process Technology | CMOS, Electrically Erasable | 0.35 micron CMOS EEPROM |
| Volte ng Pagbibigay | 3.3 V or 5 V (configurable I/O) | — |
| Packhaging | 208-pin CQFP (Ceramic Quad Flat Pack) | — |
| Bilang ng Pin | 208 | — |
| Programming Interface | JTAG BST (in-system programmable) | — |
| Operating Temperature Grade | Commercial (C suffix) | Industrial |
| Uri ng Pagpapasok | Surface Mount (Ceramic QFP) | Surface Mount |
| Tindminan RoHS | ROHS3 Compliant (per fpgalink listing) | — |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Device Type | — | EE PLD / Complex Programmable Logic Device (CPLD) |
| Macrocells / Logic Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 23.6 ns |
| Speed Grade | — | -20 |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Package Type | — | CQFP-208 (Ceramic Quad Flat Pack) |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| Package Code | — | QFP |
| Package Shape | — | Square |
| Design Tools | — | MAX+PLUS II, Quartus |
| Compliance | — | [DATA_NEEDED: RoHS status] |