EPM9560WC208-20C vs EPM9560WI208-20 比較
詳細並排比較 EPM9560WC208-20C 由 Altera 與 EPM9560WI208-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560WC208-20C | EPM9560WI208-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Device Family | MAX 9000 (EE PLD) | MAX 9000 |
| Series | EPM9560 | — |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | 16 |
| User I/O Pins | 149 | — |
| Propagation Delay (tPD) | 20 ns | — |
| 最大時脈頻率 | [DATA_NEEDED: fMAX value not in verified data] | — |
| Process Technology | CMOS, Electrically Erasable | 0.35 micron CMOS EEPROM |
| 供應電壓 | 3.3 V or 5 V (configurable I/O) | — |
| 封裝 | 208-pin CQFP (Ceramic Quad Flat Pack) | — |
| 腳位數 | 208 | — |
| Programming Interface | JTAG BST (in-system programmable) | — |
| Operating Temperature Grade | Commercial (C suffix) | Industrial |
| 安裝類型 | Surface Mount (Ceramic QFP) | Surface Mount |
| RoHS 狀態 | ROHS3 Compliant (per fpgalink listing) | — |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Device Type | — | EE PLD / Complex Programmable Logic Device (CPLD) |
| Macrocells / Logic Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 23.6 ns |
| Speed Grade | — | -20 |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Package Type | — | CQFP-208 (Ceramic Quad Flat Pack) |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| Package Code | — | QFP |
| Package Shape | — | Square |
| Design Tools | — | MAX+PLUS II, Quartus |
| Compliance | — | [DATA_NEEDED: RoHS status] |