LTC2155CUP-14 vs LTC2150CUJ-14 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LTC2155CUP-14 sa pamamagitan ng Analog Devices at LTC2150CUJ-14 sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Analog Devices
LTC2150CUJ-14 - 14-Bit 170Msps 1.8V ADC DDR LVDS | Analog Devices
LTC2150CUJ-14 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | LTC2155CUP-14 | LTC2150CUJ-14 |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | ADC/DAC | ADC/DAC |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Pangangasiwaan | 14 bit | 14 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 1 |
| Rate ng Pagkupita | 170 MSPS per channel | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential | — |
| Type ng Output | Parallel CMOS / DDR LVDS selectable | — |
| Analog Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | 1.7 V to 1.9 V (1.8 V nominal) |
| Digital Supply Voltage | 1.7 V to 1.9 V (1.8 V nominal) | 1.7 V to 1.9 V (1.8 V nominal) |
| Analog Input Bandwidth | 1.4 GHz | — |
| SNR | 70.1 dB (at 100 MHz input, per family datasheet) | — |
| SFDR | 88 dB (per family datasheet) | — |
| Power Consumption | [DATA_NEEDED: total power per pair at 170 Msps] | — |
| Packhaging | 64-QFN (9x9 mm) with exposed pad | 40-QFN (6 mm × 6 mm) with exposed pad |
| Hanay ng Temperature na Operasyon | 0C to +70C (C suffix = commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED] | — |
| Tindminan RoHS | Compliant (PBF suffix indicates Pb-free) | Compliant (Pb-free #PBF suffix) |
| Sample Rate | — | 170 Msps |
| INL (typical) | — | ±0.85 LSB |
| DNL (typical) | — | ±0.25 LSB |
| Transition Noise | — | 1.82 LSBRMS |
| Missing Codes | — | None over temperature |
| Full-Power Sample/Hold Bandwidth | — | 1.25 GHz |
| Digital Output Interface | — | DDR LVDS |
| Encode Clock Inputs | — | Differential ENC+/ENC- (sine, PECL, LVDS, TTL, CMOS) |
| Clock Duty-Cycle Stabilizer | — | Optional (selectable) |
| Configuration Interface | — | Serial SPI port |
| Latency | — | 5 clock cycles |
| Power-Saving Modes | — | Sleep and Nap modes |