SN74LS138 vs CD74HC138 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng SN74LS138 sa pamamagitan ng Texas Instruments at CD74HC138 sa pamamagitan ng Texas Instruments. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Texas Instruments
CD74HC138 - 3-to-8 Line Decoder/Demux 2-6V | Texas Instruments
CD74HC138 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | SN74LS138 | CD74HC138 |
|---|---|---|
| Brand | Texas Instruments | Texas Instruments |
| Kategorya | Logic ICs | Logic ICs |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Fungsi | 3-line to 8-line Decoder/Demultiplexer | — |
| Logic Family | 74LS (Schottky-clamped TTL) | HC (High Speed CMOS) |
| Volte ng Pagbibigay | 5 V (TTL levels) | — |
| Propagation Delay | 20 ns (typical) | [DATA_NEEDED: propagation delay at rated supply/load] |
| Outputs | 8 active-low (Y0-Y7) | 8 active-low (Y0-Y7) |
| Select Inputs | 3 (A, B, C) | 3 (A0, A1, A2) |
| Enable Inputs | 3 (G1 active-high, G2A/G2B active-low) | 3 (two active-low, one active-high) |
| Output Sink Current | 8 mA | — |
| Power Dissipation | 32 mW (typical) | — |
| Temperature na Operasyon | 0C to +70C | [DATA_NEEDED: operating temperature range per suffix] |
| Packhaging | 16-PDIP (N) | 16-pin PDIP / SOIC (per ordering suffix) |
| Other Packages | SOIC (D), SOP (NS) | — |
| Uri ng Pagpapasok | Through Hole (PDIP variant) | Through-Hole (PDIP variant) / Surface Mount (SOIC variant) |
| Technology | Bipolar TTL MSI | High-speed silicon-gate CMOS |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Applications | High-performance memory decoding, data routing | — |
| Logic Function | — | 3-to-8 Line Decoder/Demultiplexer, inverting outputs |
| Supply Voltage Range | — | 2 V to 6 V |
| Type ng Output | — | Inverting (active-low) |
| Kuru-kuryente ng Kapayapaan | — | [DATA_NEEDED: ICC quiescent current] |
| Input Logic Compatibility | — | CMOS (HC level) |
| Datasheet Document | — | SCHS147J (November 1998 - Revised November 2021) |
| Typical Use | — | Memory address decoding, data routing |