XC6SLX45-3FGG484C vs XC6SLX45-2FGG484I Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng XC6SLX45-3FGG484C sa pamamagitan ng AMD at XC6SLX45-2FGG484I sa pamamagitan ng AMD. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | XC6SLX45-3FGG484C | XC6SLX45-2FGG484I |
|---|---|---|
| Brand | AMD | AMD |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Spartan-6 LX | — |
| Logic Cells | 43,661 | 43,661 |
| System Gates | 2,138,112 | — |
| CLBs | 3,411 | — |
| User I/Os | 316 | — |
| Block RAM | 2,011 Kbits (2,088 Kb) | 2,138,112 bits (2,088 Kb/s) |
| DSP48A1 Slices | 58 | — |
| Speed Grade | -3 | -2 |
| Operating Frequency | 862 MHz | — |
| Process Technology | 45 nm CMOS | 45 nm low-power CMOS |
| Packhaging | 484-ball FBGA (FGG484), 23 x 23 mm, 1.0 mm pitch | 484-ball BGA (FBGA-484) |
| Temperature na Operasyon | 0 C to +85 C (commercial, "C" suffix) | — |
| Supply Voltage VCCINT | 1.0 V to 1.05 V | — |
| Supply Voltage VCCO | 1.2 V to 3.3 V | — |
| Memory Controller Blocks | 2 (DDR/DDR2/DDR3/LPDDR) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Lead Free / RoHS | Yes (LEAD FREE per distributor descriptions) | — |
| Family | — | Spartan-6 LX |
| Logic Slices | — | 6,822 |
| Flip-Flops | — | 54,576 |
| DSP Slices (DSP48A1) | — | 58 |
| Maximum User I/O | — | 316 |
| Package Dimensions | — | 23 x 23 mm, 1.0 mm ball pitch |
| Operating Temperature (I grade) | — | -40C to +100C (industrial) |
| Supply Voltage Core | — | 1.2 V typical |
| Clock Management Tiles | — | 6 CMT (4 DCM + 2 PLL) |
| Maximum I/O Speed | — | 800 Mbps LVDS |
| Memory Interface Support | — | DDR, DDR2, DDR3, LPDDR |
| Configuration Memory | — | AES-256 bitstream encryption |
| RoHS Compliance | — | Lead-free / RoHS compliant |