EP1SGX25FF1020I5 vs EP1SGX25FF1020 Karşılaştırma
Ayrıntılı yan yana karşılaştırma EP1SGX25FF1020I5 tarafından Altera ve EP1SGX25FF1020 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Altera
EP1SGX25FF1020I5 - Stratix GX FPGA, 25.6K Logic Cells | Intel / Altera
EP1SGX25FF1020I5 ⚠ Son Satın Alma
Özellik Karşılaştırması
| Parametre | EP1SGX25FF1020I5 | EP1SGX25FF1020 |
|---|---|---|
| Marka | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Son Alış Zamanı | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Cells | 25,660 | — |
| Configurable Logic Blocks (CLBs) | 2,566 | — |
| Maximum Internal Performance | 5000 MHz | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (Nominal) | 1.5 V | — |
| Core Supply Voltage Range | 1.425 V to 1.575 V | — |
| Paket | 1020-ball FC-FBGA (FF1020) | 1020-ball FCBGA (PBGA, 1.00 mm pitch) |
| Terminal Form | Ball | — |
| Number of Terminals | 1020 | — |
| Temperature Grade (suffix I5) | Industrial | — |
| Combinatorial Delay (ES variant) | 7.49 ns max | — |
| Montaj Türü | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| RoHS Durumu | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Embedded Transceivers | Present (Stratix GX family) | — |
| Logic Elements (LE) | — | 25,660 |
| Configurable Logic Blocks (CLB) | — | 2,566 |
| Embedded Memory (bits) | — | 1,944,576 |
| Logic Cells (per FPGAkey) | — | 25,660 |
| Combinatorial Delay (Tpd) | — | 7.49 ns (per Microchip USA datasheet summary) |
| Operating Frequency (max) | — | [DATA_NEEDED: max internal operating frequency] |
| Pin/Package Count | — | 1020 |
| İşletim Sıcaklığı | — | -40C to +85C (industrial variant) / 0C to +85C (commercial variant) |
| Besleme Gerilimi | — | [DATA_NEEDED: core VCC voltage] |
| Serial Transceivers | — | Embedded SERDES (multi-gigabit, protocol-dependent) |
| DSP Blocks | — | Embedded dedicated multipliers |
| PLL / Clock Management | — | Embedded PLLs |
| Configuration Method | — | SRAM-based, configuration via JTAG / passive serial / fast passive parallel |