EP1SGX25FF1020I5 vs EP1SGX25FF1020 比較
詳細並排比較 EP1SGX25FF1020I5 由 Altera 與 EP1SGX25FF1020 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX25FF1020I5 - Stratix GX FPGA, 25.6K Logic Cells | Intel / Altera
EP1SGX25FF1020I5 ⚠ 最後購買機會
規格比較
| 參數 | EP1SGX25FF1020I5 | EP1SGX25FF1020 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Cells | 25,660 | — |
| Configurable Logic Blocks (CLBs) | 2,566 | — |
| Maximum Internal Performance | 5000 MHz | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (Nominal) | 1.5 V | — |
| Core Supply Voltage Range | 1.425 V to 1.575 V | — |
| 封裝 | 1020-ball FC-FBGA (FF1020) | 1020-ball FCBGA (PBGA, 1.00 mm pitch) |
| Terminal Form | Ball | — |
| Number of Terminals | 1020 | — |
| Temperature Grade (suffix I5) | Industrial | — |
| Combinatorial Delay (ES variant) | 7.49 ns max | — |
| 安裝類型 | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Embedded Transceivers | Present (Stratix GX family) | — |
| Logic Elements (LE) | — | 25,660 |
| Configurable Logic Blocks (CLB) | — | 2,566 |
| Embedded Memory (bits) | — | 1,944,576 |
| Logic Cells (per FPGAkey) | — | 25,660 |
| Combinatorial Delay (Tpd) | — | 7.49 ns (per Microchip USA datasheet summary) |
| Operating Frequency (max) | — | [DATA_NEEDED: max internal operating frequency] |
| Pin/Package Count | — | 1020 |
| 工作溫度 | — | -40C to +85C (industrial variant) / 0C to +85C (commercial variant) |
| 供應電壓 | — | [DATA_NEEDED: core VCC voltage] |
| Serial Transceivers | — | Embedded SERDES (multi-gigabit, protocol-dependent) |
| DSP Blocks | — | Embedded dedicated multipliers |
| PLL / Clock Management | — | Embedded PLLs |
| Configuration Method | — | SRAM-based, configuration via JTAG / passive serial / fast passive parallel |