EP910JC-30 vs EP910LC-30Y Karşılaştırma
Ayrıntılı yan yana karşılaştırma EP910JC-30 tarafından Intel ve EP910LC-30Y tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Özellik Karşılaştırması
| Parametre | EP910JC-30 | EP910LC-30Y |
|---|---|---|
| Marka | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Obsolete | NRND |
| Family | Classic EPLD (MAX-style) | Altera Classic EPLD |
| Propagation Delay (tpd) | 30 ns | — |
| Maximum Internal Frequency (Fmax) | 33.3 MHz | — |
| Macrocells | 24 | 24 |
| Inputs | 36 | — |
| Product Terms | 240 | — |
| Outputs | 10 dedicated | — |
| Supply Voltage (Vcc) | 5 V | — |
| Technology | CMOS EPROM, UV-erasable | — |
| Paket | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) | PLCC-44 |
| İşletim Sıcaklığı | [DATA_NEEDED: operating temperature range] | Commercial 0C to +70C |
| Supply Current (Icc) | [DATA_NEEDED: Icc typical / maximum] | — |
| Montaj Türü | Surface Mount (socket-mountable) | Surface Mount (PLCC socket) |
| RoHS Durumu | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Logic Blocks | 24 macrocells (AND/OR array architecture) | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Counter Frequency (fMAX) | — | 100 MHz (family maximum) |
| Besleme Gerilimi | — | 5 V (TTL-compatible) |
| Process Technology | — | CMOS, UV-erasable / OTP |
| Speed/Power Grade | — | LC (low-power, 30ns) |
| Processing Flow | — | Y (extended reliability) |
| Logic Compatibility | — | 100% TTL emulation |