EPM7096LC84-15 vs EPM7128ELC84-12 Karşılaştırma
Ayrıntılı yan yana karşılaştırma EPM7096LC84-15 tarafından Altera ve EPM7128ELC84-12 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Özellik Karşılaştırması
| Parametre | EPM7096LC84-15 | EPM7128ELC84-12 |
|---|---|---|
| Marka | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 (MAX 7000E series) |
| Series | MAX 7000 (second-generation MAX architecture) | — |
| Macro Cells | 96 | — |
| Logic Array Blocks (LABs) | 4 | 8 |
| Usable Gates | 1,800 | 2,500 |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Programmable Type | EE PLD (in-system programmable via JTAG) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | JTAG (IEEE 1149.1) / ISP |
| İşletim Sıcaklığı | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Paket / Kas | 84-PLCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Montaj Türü | Surface Mount | Surface Mount (PLCC socket compatible) |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | — |
| RoHS Durumu | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy 5V part, SnPb finish) |
| Logic Family | — | CMOS, EEPROM-based |
| Macrocells | — | 128 |
| User I/Os | — | 84 |
| Propagation Delay (tpd1) | — | 12 ns |
| Internal Global Clock Frequency | — | 90.9 MHz |
| Setup Time | — | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | — | 5 V (4.75 V to 5.25 V) |
| Paket | — | 84-pin PLCC (J-Lead, QCCJ) |
| Pin Sayısı | — | 84 |