EPM7096LC84-15 vs EPM7128ELC84-12 Comparison
Detailed side-by-side comparison of EPM7096LC84-15 by Altera and EPM7128ELC84-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7096LC84-15 | EPM7128ELC84-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $10.40 |
| Family | MAX 7000 | MAX 7000 (MAX 7000E series) |
| Series | MAX 7000 (second-generation MAX architecture) | β |
| Macro Cells | 96 | β |
| Logic Array Blocks (LABs) | 4 | 8 |
| Usable Gates | 1,800 | 2,500 |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | β |
| Maximum Operating Frequency | 76.9 MHz | β |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | β |
| Programmable Type | EE PLD (in-system programmable via JTAG) | β |
| Programming Interface | IEEE Std. 1149.1 JTAG | JTAG (IEEE 1149.1) / ISP |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package / Case | 84-PLCC (J-Lead) | β |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | β |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket compatible) |
| Data Retention | [DATA_NEEDED: data retention years] | β |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy 5V part, SnPb finish) |
| Logic Family | β | CMOS, EEPROM-based |
| Macrocells | β | 128 |
| User I/Os | β | 84 |
| Propagation Delay (tpd1) | β | 12 ns |
| Internal Global Clock Frequency | β | 90.9 MHz |
| Setup Time | β | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | β | 5 V (4.75 V to 5.25 V) |
| Package | β | 84-pin PLCC (J-Lead, QCCJ) |
| Pin Count | β | 84 |