CYPD3135-40LQXI - EZ-PD CCG3 USB-C PD Controller | Infineon
MPN: CYPD3135-40LQXI ✓ Hoạt độngCYPD3135-40LQXI Tóm tắt
A USB Type-C port controller is a specialized interface IC that manages the USB-C connector's Configuration Channel (CC) and USB Power Delivery (USB PD) protocol negotiation. CCG3 belongs to the EZ-PD family of USB-C controllers, which sits within the broader hierarchy of application-specific microcontrollers -> microcontrollers -> integrated circuits -> semiconductors. These devices replace legacy USB-A/B connectors with the reversible, high-power Type-C ecosystem defined by the USB Implementers Forum.
Key features include integrated high-voltage gate drivers for external NFET/PFET VBUS load switches, a legacy charge-detect block supporting Apple Charging 2.4 A, Qualcomm QC 4.0, and Samsung AFC protocols, hardware USB PD 3.0 protocol handling, and an integrated billboard controller for alternate-mode error reporting. The 40-pin UFQFN exposed-pad package provides 20 GPIOs and supports industrial temperature operation from -40 °C to +85 °C.
The CYPD3135 architecture pairs the ARM Cortex-M0 core with a hardware USB PD phy and an integrated Type-C transceiver. Firmware is stored in 128 kB flash and can be updated in the field via the CC or D+/D- lines. The high-voltage gate driver outputs tolerate VBUS transients up to 21.5 V, eliminating external bootstrap or charge-pump circuitry. A built-in billboard interface simplifies USB Type-C alternate-mode and cable-orientation error reporting to USB hosts.
Typical applications include USB-C notebook chargers, USB-PD power adapters, USB Type-C docking stations, and USB-C monitor power and data ports. The wide 2.7-21.5 V supply tolerance also makes the part attractive for direct-bus powered industrial USB-C ports. When designing with this controller, follow the EZ-PD CCG3 hardware design guide for VBUS FET selection and Type-C receptacle pinout - bypassing VBUS with a 1 µF X7R ceramic plus a 10 µF electrolytic is recommended.
Bộ thay thế dễ dàng lắp đặt cho CYPD3135-40LQXI — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với CYPD3135-40LQXI (cùng hình factor và footprint) — khác nhau ở Package, Product Type, Legacy Charge Detect, Integrated Gate Drivers, RoHS Status.
CYPD3135-40LQXIT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →CYPD3135-40LQXQ
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →CYPD3125-40LQXIT
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
CYPD3123-40LQXIT
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
CYPD3120-40LQXI
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
CYPD3135-40LQXI Thông số kỹ thuật
| Product Type | USB Type-C Port Controller (USB PD 3.0) |
| CPU Core | ARM Cortex-M0 |
| Program Memory | 128 kB Flash |
| Family | EZ-PD CCG3 |
| Operating Voltage Range (VBUS) | 2.7 V to 21.5 V |
| Điện áp cung cấp | 25 mA |
| GPIOs | 20 |
| Khoảng nhiệt độ hoạt động | -40 °C to +85 °C |
| Package Type | 40-pin UFQFN Exposed Pad |
| Giao diện | USB Type-C, USB PD 3.0, I2C, SPI, GPIO |
| Kiểu lắp đặt | Surface Mount |
| Integrated Gate Drivers | Yes (NFET and PFET high-voltage) |
| Legacy Charge Detect | Apple 2.4 A, QC 4.0, Samsung AFC |
| Billboard Controller | Integrated |
| Trạng thái RoHS | Compliant |
Cấu hình chân CYPD3135-40LQXI
| Chân 1 | VBUS — USB Type-C VBUS supply input, 2.7 V to 21.5 V |
| Chân 2 | GND — Ground |
| Chân 3 | CC1 — USB Type-C Configuration Channel line 1 |
| Chân 4 | CC2 — USB Type-C Configuration Channel line 2 |
| Chân 5 | DP1 — USB D+ line 1 |
| Chân 6 | DN1 — USB D- line 1 |
| Chân 7 | DP2 — USB D+ line 2 |
| Chân 8 | DN2 — USB D- line 2 |
| Chân 9 | GPIO0 — General purpose I/O 0 |
| Chân 10 | GPIO1 — General purpose I/O 1 |
| Chân 11 | GPIO2 — General purpose I/O 2 |
| Chân 12 | GPIO3 — General purpose I/O 3 |
| Chân 13 | GPIO4 — General purpose I/O 4 |
| Chân 14 | GPIO5 — General purpose I/O 5 |
| Chân 15 | GPIO6 — General purpose I/O 6 |
| Chân 16 | GPIO7 — General purpose I/O 7 |
| Chân 17 | GPIO8 — General purpose I/O 8 |
| Chân 18 | GPIO9 — General purpose I/O 9 |
| Chân 19 | GPIO10 — General purpose I/O 10 |
| Chân 20 | GPIO11 — General purpose I/O 11 |
| Chân 21 | GPIO12 — General purpose I/O 12 |
| Chân 22 | GPIO13 — General purpose I/O 13 |
| Chân 23 | GPIO14 — General purpose I/O 14 |
| Chân 24 | GPIO15 — General purpose I/O 15 |
| Chân 25 | GPIO16 — General purpose I/O 16 |
| Chân 26 | GPIO17 — General purpose I/O 17 |
| Chân 27 | GPIO18 — General purpose I/O 18 |
| Chân 28 | GPIO19 — General purpose I/O 19 |
| Chân 29 | SCL — I2C clock |
| Chân 30 | SDA — I2C data |
| Chân 31 | GATEP — PFET gate driver output |
| Chân 32 | GATEN — NFET gate driver output |
| Chân 33 | INT — Interrupt output |
| Chân 34 | RESET — Reset input, active low |
| Chân 35 | XRES — External reset |
| Chân 36 | SWDIO — ARM SWD data |
| Chân 37 | SWDCK — ARM SWD clock |
| Chân 38 | VDD — Internal 3.3 V regulator output |
| Chân 39 | VBAT — Battery / supply input |
| Chân 40 | EP — Exposed thermal pad (ground) |
Ứng dụng tiêu biểu
CYPD3135-40LQXI phù hợp cho 6 Áp dụngs: USB-C Notebook Charger Port, USB-PD Power Adapter, USB-C Docking Station Downstream Port, USB-C Monitor Power and Data Port, Industrial USB-C Service Port, USB-C Power Bank / Portable Charger.
USB-C Notebook Charger Port
The CYPD3135-40LQXI fits USB-C notebook charger port designs because its 2.7-21.5 V VBUS tolerance accepts the full USB PD 3.0 voltage range directly. Hardware USB PD 3.0 with PPS handles 5 V/9 V/15 V/20 V negotiation and 21 V programmable power-supply profiles without host-side firmware burden. Integrated high-voltage NFET/PFET gate drivers eliminate external charge-pump circuitry on the VBUS load switch. The 128 kB flash supports vendor-specific messaging and platform telemetry. Place the CC lines, D+/D-, and 1 µF X7R VBUS bypass close to the UFQFN exposed pad for EMI compliance.
Được đề xuất
USB-PD Power Adapter
The CYPD3135-40LQXI fits USB-PD power adapters because the integrated high-voltage gate drivers and 21.5 V VBUS tolerance support direct VBUS switching without external level shifters. Hardware USB PD 3.0 with PPS plus Apple 2.4 A, QC 4.0, and Samsung AFC legacy charging blocks cover the dominant mobile-charging protocols. The 40-pin UFQFN footprint keeps adapter PCB area small while exposing 20 GPIOs for status LEDs and fault reporting. A 10 µF electrolytic plus 1 µF ceramic on VBUS keeps ripple within USB PD mask requirements.
Được đề xuất
USB-C Docking Station Downstream Port
The CYPD3135-40LQXI fits USB-C docking-station downstream ports because its billboard controller reports alternate-mode and cable-orientation errors to the USB host. 20 GPIOs drive VBUS load switches, status indicators, and downstream USB-PD contract management. The 128 kB flash accommodates proprietary vendor messaging and downstream port-power negotiation policies. Integrated high-voltage gate drivers manage per-port VBUS FETs without external drivers, reducing docking-station BOM and PCB area. Operating from -40 °C to +85 °C supports industrial dock deployments.
Được đề xuất
USB-C Monitor Power and Data Port
The CYPD3135-40LQXI fits USB-C monitor power and data ports because its 21.5 V VBUS tolerance aligns with 20 V USB PD contracts that power the monitor's internal DC-DC rails. Hardware USB PD 3.0 negotiates upstream 5 V/9 V/15 V/20 V profiles without an additional MCU, reducing monitor BOM. Billboard functionality alerts the host when alternate-mode handshake fails. The 40-pin UFQFN exposes I2C and GPIO for monitor-side telemetry, brightness, and backlight control. Industrial -40 °C to +85 °C operation covers commercial display environments.
Được đề xuất
Industrial USB-C Service Port
The CYPD3135-40LQXI fits industrial USB-C service ports because the -40 °C to +85 °C operating range handles factory-floor temperature swings. Hardware USB PD 3.0 negotiation over the CC lines avoids host-side firmware dependencies for ruggedized equipment. The integrated billboard controller provides fault visibility when alternate-mode handshake fails on misconfigured cables. High-voltage gate drivers allow direct VBUS switching up to 21.5 V without external drivers. 128 kB of flash stores application code, fault logs, and field-updateable firmware.
Được đề xuất
USB-C Power Bank / Portable Charger
The CYPD3135-40LQXI fits USB-C power-bank designs because integrated legacy charge-detect (Apple 2.4 A, QC 4.0, Samsung AFC) covers legacy phones alongside USB PD 3.0 PPS for newer devices. The 2.7-21.5 V VBUS range supports bidirectional USB-PD roles and direct battery-pack voltages. Hardware PD negotiation offloads the main power-bank MCU. Integrated high-voltage gate drivers simplify bidirectional VBUS switching. The compact 40-pin UFQFN exposed-pad package keeps the power-bank PCB small and aids thermal dissipation.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho CYPD3135-40LQXI — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | CYPD3135-40LQXIT | CYPD3135-40LQXQ | CYPD3125-40LQXIT | CYPD3123-40LQXIT | CYPD3120-40LQXI |
|---|---|---|---|---|---|---|
| Package | 40-UFQFN Exposed Pad | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same |
| Brand | Infineon Technologies | Infineon Technologies - same | Infineon Technologies - same | Infineon Technologies - same | Infineon Technologies - same | Infineon Technologies - same |
| Family | EZ-PD CCG3 | EZ-PD CCG3 - same | EZ-PD CCG3 - same | EZ-PD CCG3 - same | EZ-PD CCG3 - same | EZ-PD CCG3 - same |
| CPU Core | ARM Cortex-M0 | ARM Cortex-M0 - same | ARM Cortex-M0 - same | ARM Cortex-M0 - same | ARM Cortex-M0 - same | ARM Cortex-M0 - same |
| Flash | 128 kB | 128 kB - same | 128 kB - same | lower (CCG3) | lower (CCG3) | lower (CCG3) |
| GPIOs | 20 | 20 - same | 20 - same | 20 - same | 20 - same | 20 - same |
| Operating Voltage (VBUS) | 2.7 V to 21.5 V | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same |
| USB PD 3.0 PPS Support | Yes | Yes - same | Yes - same | Limited | Limited | No |
| Packaging Form | Tray | Tape & Reel | Tray / Tape & Reel | Tape & Reel | Tape & Reel | Tray |
Bảo phân biệt quan trọng
- Integrated high-voltage NFET/PFET gate drivers (vsCYPD3120-40LQXI)
- Hardware USB PD 3.0 with PPS support (vsCYPD3125-40LQXIT)
- 128 kB flash headroom for vendor messaging (vsCYPD3123-40LQXIT)
Ghi chú thiết kế
Per the Infineon EZ-PD CCG3 hardware design guide, place a 1 µF X7R ceramic bypass plus a 10 µF electrolytic on VBUS. Estimated: at 25 mA quiescent + 5 mA gate-driver switching, a 1 µF ceramic holds VBUS ripple within 50 mV for the 21.5 V transient envelope. Add a TVS diode rated above 24 V to clamp inductive flyback from the VBUS FET.
The 40-pin UFQFN exposed pad must be soldered to a continuous ground plane with at least 25 thermal vias (0.3 mm drill, 1 mm pitch) for heat removal. Estimated: at 25 mA * 3.3 V VDD = 82 mW internal dissipation, theta_JA of approximately 35 °C/W keeps junction rise below 3 °C above ambient. Avoid routing signal traces across the exposed pad plane.
Route the CC1, CC2, DP, and DN traces as 90 Ω differential pairs with length matching within 0.5 mm. Place the 5.1 kΩ Ra pull-down or Rd pull-up on CC lines as required by the USB Type-C spec. Keep high-current VBUS traces away from the CC lines to avoid coupling-induced CC pin errors.
Do not omit the external 32.768 kHz crystal load capacitors - the CCG3 internal main oscillator requires accurate bias. Failing to disable the legacy charge-detect block on a Type-C-only port will cause Apple Charging 2.4 A handshake failures on certain iPhone models. Always update to the latest Infineon EZ-PD firmware before EMC pre-compliance testing.
Thông tin tuân thủ
RoHS and lead-free compliant per Infineon product page. Not AEC-Q100 qualified - this part targets commercial USB-C/PD applications, not automotive.
