PIC18F97J60-I/PT - 8-bit MCU w/ 10Mbps Ethernet, 128KB Flash
MPN: PIC18F97J60-I/PT ✓ Hoạt độngPIC18F97J60-I/PT Tóm tắt
A microcontroller (MCU) is a single-chip computer that combines a CPU core, program memory (Flash), data memory (RAM), and a rich set of on-chip peripherals such as timers, ADCs, communication controllers, and I/O ports. The PIC18F97J60 belongs to Microchip's PIC18J family, which uses a 16-bit enhanced Harvard architecture that targets higher-performance, Ethernet-connected embedded designs. Its hierarchy places it within 8-bit microcontrollers -> Microchip PIC family -> PIC18 high-performance sub-family -> PIC18J Ethernet-enabled series.
Key features include the integrated IEEE 802.3 10BASE-T Ethernet controller with on-chip PHY and dedicated DMA, an 8-channel hardware modulator for IrDA/SIR, two MSSP (SPI/I2C) ports, two USART modules, two capture/compare/PWM modules, and 70 I/O pins. The on-chip PHY eliminates external Ethernet magnetics and dramatically reduces BOM cost compared to MCU-plus-external-MAC designs.
The device uses an enhanced RISC pipeline with 32-level hardware stack and vectored interrupts, executed from Flash or external memory. The 100-pin TQFP package provides abundant I/O for parallel buses and memory-mapped LCDs, while a wide operating voltage of 2.0-3.6 V and -40C to +85C industrial temperature range support harsh industrial environments.
Typical applications include industrial automation (Modbus/TCP gateways, remote sensor nodes), building automation (BACnet/IP controllers, access panels), and remote monitoring (web/SCADA interfaces). The integrated Ethernet peripheral makes the part especially attractive for designers replacing RS-485 or CAN-based infrastructure with low-cost TCP/IP connectivity.
When designing with the PIC18F97J60-I/PT, allocate at least 8 KB of Flash for the TCP/IP stack (Microchip's MLA or Harmony-based stack) and carefully observe the Ethernet PCB layout guidelines (4-layer board, controlled-impedance 100-ohm differential traces, dedicated ground pour). The internal 3.3 V LDO must be bypassed with 10 uF and 0.1 uF capacitors placed close to the VDD pins.
Bộ thay thế dễ dàng lắp đặt cho PIC18F97J60-I/PT — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với PIC18F97J60-I/PT (cùng hình factor và footprint) — khác nhau ở Package, Program Memory (Flash), RAM, ADC, Core.
PIC18F97J60T-I/PT
✅ Drop-In📋 Tham chiếu thay thế (không có trong danh mục)
PIC18F96J60-I/PT
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC18F87J60-I/PT
✅ Drop-In ⚠️ Thông số chưa được xác minhLiên hệ để biết giá
Xem tài liệu →PIC18F96J94-I/PF
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →PIC18F97J60-I/PT Tỷ lệ tối đa & tính chất điện
| Core Architecture | PIC18, 8-bit enhanced Harvard RISC |
| Instruction Set Width | 16 bits |
| Program Memory (Flash) | 128 KB (64K x 16) |
| RAM | 3808 bytes |
| EEPROM | Not present (uses Flash emulation) |
| Maximum CPU Frequency | 41.667 MHz |
| Instruction Cycle Time | 200 ns |
| Performance | 16 MIPS (million instructions per second) |
| Supply Voltage (VDD) | 2.0 V to 3.6 V |
| Nhiệt độ hoạt động | -40 C to +85 C (Industrial) |
| I/O Pins | 70 |
| Ethernet Peripheral | Integrated IEEE 802.3 10BASE-T MAC + PHY |
| ADC | 10-bit, up to 16 channels |
| Communication Peripherals | 2x USART, 2x MSSP (SPI/I2C), 1x Ethernet, 1x IrDA |
| Timers | 5 x 16-bit / 8-bit Timer modules |
| PWM / CCP | 2 Capture/Compare/PWM modules |
| Hộp | 100-pin TQFP (PT), 12x12 mm |
| Kiểu lắp đặt | Surface Mount |
| Cấp MSL | 3 (168 hours) |
| Trạng thái RoHS | Compliant |
Cấu hình chân PIC18F97J60-I/PT
| Chân 1 | RG0/INT0 — PORTG bit 0 / External interrupt 0 |
| Chân 2 | RG1/INT1 — PORTG bit 1 / External interrupt 1 |
| Chân 3 | RG2/INT2 — PORTG bit 2 / External interrupt 2 |
| Chân 4 | RG3/INT3 — PORTG bit 3 / External interrupt 3 |
| Chân 5 | MCLR — Master Clear (reset) input, active low |
| Chân 6 | RG4 — PORTG bit 4 |
| Chân 7 | RG5 — PORTG bit 5 |
| Chân 8 | VDD — Digital supply voltage (3.3 V) |
| Chân 9 | VSS — Digital ground |
| Chân 10 | RF7 — PORTF bit 7 |
| Chân 11 | RF6 — PORTF bit 6 |
| Chân 12 | RB7 — PORTB bit 7 |
| Chân 13 | RB6 — PORTB bit 6 |
| Chân 14 | RB5 — PORTB bit 5 |
| Chân 15 | RB4 — PORTB bit 4 |
| Chân 16 | RB3 — PORTB bit 3 |
| Chân 17 | RB2 — PORTB bit 2 |
| Chân 18 | RB1 — PORTB bit 1 |
| Chân 19 | RB0 — PORTB bit 0 |
| Chân 20 | VDD — Digital supply voltage (3.3 V) |
| Chân 21 | VSS — Digital ground |
| Chân 22 | RD7 — PORTD bit 7 |
| Chân 23 | RD6 — PORTD bit 6 |
| Chân 24 | RD5 — PORTD bit 5 |
| Chân 25 | RD4 — PORTD bit 4 |
| Chân 26 | RD3 — PORTD bit 3 |
| Chân 27 | RD2 — PORTD bit 2 |
| Chân 28 | RD1 — PORTD bit 1 |
| Chân 29 | RD0 — PORTD bit 0 |
| Chân 30 | RC7 — PORTC bit 7 |
| Chân 31 | RC6 — PORTC bit 6 |
| Chân 32 | RC5 — PORTC bit 5 |
| Chân 33 | RC4 — PORTC bit 4 |
| Chân 34 | RC3 — PORTC bit 3 |
| Chân 35 | RC2 — PORTC bit 2 |
| Chân 36 | RC1 — PORTC bit 1 |
| Chân 37 | RC0 — PORTC bit 0 |
| Chân 38 | RE7 — PORTE bit 7 |
| Chân 39 | RE6 — PORTE bit 6 |
| Chân 40 | RE5 — PORTE bit 5 |
| Chân 41 | RE4 — PORTE bit 4 |
| Chân 42 | RE3 — PORTE bit 3 |
| Chân 43 | RE2 — PORTE bit 2 |
| Chân 44 | RE1 — PORTE bit 1 |
| Chân 45 | RE0 — PORTE bit 0 |
| Chân 46 | RA7 — PORTA bit 7 |
| Chân 47 | RA6 — PORTA bit 6 |
| Chân 48 | RA5 — PORTA bit 5 |
| Chân 49 | RA4 — PORTA bit 4 |
| Chân 50 | RA3 — PORTA bit 3 |
| Chân 51 | RA2 — PORTA bit 2 |
| Chân 52 | RA1 — PORTA bit 1 |
| Chân 53 | RA0 — PORTA bit 0 |
| Chân 54 | VSS — Digital ground |
| Chân 55 | VDD — Digital supply voltage (3.3 V) |
| Chân 56 | VSS — Digital ground |
| Chân 57 | VDD — Digital supply voltage (3.3 V) |
| Chân 58 | RF0 — PORTF bit 0 |
| Chân 59 | RF1 — PORTF bit 1 |
| Chân 60 | RF2 — PORTF bit 2 |
| Chân 61 | RF3 — PORTF bit 3 |
| Chân 62 | RF4 — PORTF bit 4 |
| Chân 63 | RF5 — PORTF bit 5 |
| Chân 64 | RH7 — PORTH bit 7 |
| Chân 65 | RH6 — PORTH bit 6 |
| Chân 66 | RH5 — PORTH bit 5 |
| Chân 67 | RH4 — PORTH bit 4 |
| Chân 68 | RH3 — PORTH bit 3 |
| Chân 69 | RH2 — PORTH bit 2 |
| Chân 70 | RH1 — PORTH bit 1 |
| Chân 71 | RH0 — PORTH bit 0 |
| Chân 72 | RJ7 — PORTJ bit 7 |
| Chân 73 | RJ6 — PORTJ bit 6 |
| Chân 74 | RJ5 — PORTJ bit 5 |
| Chân 75 | RJ4 — PORTJ bit 4 |
| Chân 76 | RJ3 — PORTJ bit 3 |
| Chân 77 | RJ2 — PORTJ bit 2 |
| Chân 78 | RJ1 — PORTJ bit 1 |
| Chân 79 | RJ0 — PORTJ bit 0 |
| Chân 80 | VSS — Digital ground |
| Chân 81 | VDD — Digital supply voltage (3.3 V) |
| Chân 82 | TPOUT+ — Ethernet differential transmit output (positive) |
| Chân 83 | TPOUT- — Ethernet differential transmit output (negative) |
| Chân 84 | RBIAS — Ethernet PHY bias resistor connection |
| Chân 85 | VDDRUN — Internal regulator output for Ethernet PHY (3.3 V) |
| Chân 86 | TPIN+ — Ethernet differential receive input (positive) |
| Chân 87 | TPIN- — Ethernet differential receive input (negative) |
| Chân 88 | VSSPLL — PLL ground |
| Chân 89 | VDDPLL — PLL supply voltage |
| Chân 90 | OSC1 — Crystal oscillator input |
| Chân 91 | OSC2 — Crystal oscillator output |
| Chân 92 | VDD — Digital supply voltage (3.3 V) |
| Chân 93 | VSS — Digital ground |
| Chân 94 | RK7 — PORTK bit 7 |
| Chân 95 | RK6 — PORTK bit 6 |
| Chân 96 | RK5 — PORTK bit 5 |
| Chân 97 | RK4 — PORTK bit 4 |
| Chân 98 | RK3 — PORTK bit 3 |
| Chân 99 | RK2 — PORTK bit 2 |
| Chân 100 | RK1 — PORTK bit 1 |
Ứng dụng tiêu biểu
PIC18F97J60-I/PT phù hợp cho 6 Áp dụngs: Industrial Ethernet Sensor Node, Building Automation Controller, Web/SCADA Remote Monitor, IoT Ethernet Gateway, Point-of-Sale / Vending Ethernet Bridge, Security / Access Control Panel.
Industrial Ethernet Sensor Node
The PIC18F97J60-I/PT's integrated 10BASE-T MAC/PHY and 128 KB Flash make it ideal for distributed industrial sensor nodes that publish Modbus/TCP or simple HTTP/JSON telemetry. Its 16 MIPS throughput handles both the TCP/IP stack (Microchip MLA, ~8 KB Flash) and the application code (sensor sampling, calibration) within a single chip. The 2.0-3.6 V supply and -40 C to +85 C industrial temperature range cover harsh factory environments, while 70 I/O pins accommodate multiple sensor inputs and digital outputs. Compared to MCU+external-PHY designs, the on-chip PHY removes a major BOM line and simplifies PCB layout.
Được đề xuất
Building Automation Controller
Building automation BACnet/IP and Modbus TCP controllers benefit from the PIC18F97J60-I/PT's integrated Ethernet and 128 KB of program Flash. The on-chip 10-bit ADC scans temperature, humidity, and occupancy sensors while two USART modules interface with legacy RS-485 HVAC equipment. The 70 I/O pins drive relay outputs, triac controls, and indicator LEDs directly without external logic. Per the Microchip datasheet, the industrial temperature range of -40 C to +85 C supports rooftop and mechanical-room installations. The integrated HP Auto-MDIX eliminates crossover cable headaches during commissioning.
Được đề xuất
Web/SCADA Remote Monitor
The PIC18F97J60-I/PT powers compact web-enableable SCADA remote terminal units (RTUs) by running an embedded HTTP server with HTML/JSON status pages and a simple TCP socket listener for SCADA polling. The 128 KB Flash fits both the TCP/IP stack and the application web pages. With 3,808 B RAM and a 200 ns instruction cycle, the part can sustain ~10 simultaneous connections on a 10 Mbps network. The integrated PHY eliminates external magnetics complexity - designers only need the 1:1 transformer and RJ-45 jack.
Được đề xuất
IoT Ethernet Gateway
The PIC18F97J60-I/PT serves as a cost-optimized Ethernet-to-serial/IoT gateway that bridges Wi-Fi-less endpoints to the LAN. Its two USART modules connect to Bluetooth or ZigBee co-processors, while MSSP ports host SPI sensors. The integrated Ethernet peripheral publishes aggregated sensor data over HTTP/MQTT. With 128 KB Flash, the part handles a complete TLS-lite or unsecured MQTT client alongside routing logic. The 3.3 V single-supply operation simplifies power tree design for compact IoT gateway enclosures.
Được đề xuất
Point-of-Sale / Vending Ethernet Bridge
Vending and POS equipment often requires retrofit Ethernet for inventory telemetry without redesigning the host controller. The PIC18F97J60-I/PT acts as a co-processor that translates legacy RS-232/RS-485 POS traffic onto Ethernet (EtherNet/IP, TCP socket). Its 128 KB Flash stores a vendor-specific protocol stack, while the integrated 10 Mbps Ethernet handles backhaul traffic. The industrial temperature grade and 2.0-3.6 V supply fit unattended kiosk environments with wide temperature swings and battery-backed 3.3 V rails.
Được đề xuất
Security / Access Control Panel
Access control panels using the PIC18F97J60-I/PT leverage its 70 I/O pins for Wiegand readers, door strikes, REX sensors, and status LEDs while publishing events to a centralized access control server over Ethernet. The integrated 10BASE-T PHY supports PoE-style deployments with the addition of a passive splitter, and 128 KB Flash fits TLS handshake and credential caching logic. The -40 C to +85 C operating range covers outdoor gate controllers, while the integrated PHY enables real-time door status updates with sub-second latency over the LAN.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho PIC18F97J60-I/PT — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | PIC18F97J60T-I/PT | PIC18F96J60-I/PT | PIC18F87J60-I/PT | PIC18F96J94-I/PF |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-pin TQFP (PT) | 100-pin TQFP (PT) | 100-pin TQFP (PT) | 80-pin TQFP (PT) | 100-pin TQFP (PF) |
| Flash Memory | 128 KB | 128 KB | 64 KB | 128 KB | 64 KB |
| Max CPU Frequency | 41.667 MHz (16 MIPS) | 41.667 MHz (16 MIPS) | 41.667 MHz (16 MIPS) | 41.667 MHz (16 MIPS) | 41.667 MHz (16 MIPS) |
| Integrated Ethernet PHY | Yes (10BASE-T, MAC + PHY) | Yes (10BASE-T, MAC + PHY) | Yes (10BASE-T, MAC + PHY) | Yes (10BASE-T, MAC + PHY) | No (MAC only, external PHY required) |
| Supply Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Approx. Unit Price (qty 1, USD) | $11.83 | ~$11.83 | ~$10.50 | ~$11.50 | ~$13.20 |
Bảo phân biệt quan trọng
- Integrated 10BASE-T MAC + PHY on a single 8-bit MCU die (vsPIC18F97J94-I/PF)
- Double the Flash memory versus PIC18F96J60 sibling (vsPIC18F96J60-I/PT)
- Highest I/O count in the PIC18F97J60 family (vsPIC18F87J60-I/PT)
- Industrial temperature grade -40 C to +85 C in 100-pin TQFP (vsPIC18F96J60-I/PF (100-pin TQFP, PF suffix))
Ghi chú thiết kế
The integrated 10BASE-T Ethernet PHY is highly sensitive to PCB layout. Use a 4-layer board with a continuous ground plane beneath the Ethernet signal traces. The TPOUT+/TPOUT- and TPIN+/TPIN- pairs must be routed as 100-ohm differential pairs with matched lengths within 2 mm. Keep the RBIAS resistor within 5 mm of pin 84 and the VDDRUN/VDDPLL decoupling caps within 3 mm of their respective pins. Reference Microchip AN1120 for the recommended magnetics and RJ-45 jack selection.
The PIC18F97J60-I/PT has multiple VDD/VSS pins that must all be connected and bypassed. Place a 0.1 uF ceramic capacitor close to each VDD/VSS pair, and add a bulk 10 uF tantalum or ceramic capacitor near the package. The internal 3.3 V regulator requires a 4.7 uF low-ESR capacitor on VDDRUN (pin 85) and VDDPLL (pin 89) for stable operation. Without proper bypassing, the Ethernet PHY will exhibit high bit-error rates or link failure.
Crystal placement is critical for the Ethernet MAC. The 25 MHz or 41.667 MHz crystal (per oscillator configuration) should be placed within 10 mm of pins 90/91 with short, symmetric traces and a guard ground ring. Avoid routing any switching signals (PWM, digital outputs) near the crystal traces or the Ethernet differential pairs. The MCLR pin should have a 10 kohm pull-up to VDD and a 100 nF cap to ground for in-circuit serial programming (ICSP) reliability.
Do not assume the 128 KB Flash is fully available for application code - the TCP/IP stack (MLA or Harmony-based) consumes 8-15 KB. Reserve at least one Flash erase page (1024 bytes) for EEPROM emulation and at least 4 KB for bootloader/field-update capability. The Ethernet MAC requires a unique 48-bit MAC address; design in a MAC address EEPROM like 25AA02E48 to avoid hard-coding addresses per unit.
Although the Ethernet PHY is integrated, the TPOUT+/- signals still pass through external 1:1 isolation transformers before the RJ-45 connector. Choose a transformer with integrated common-mode chokes (e.g., Pulse H1102 or equivalent) to meet IEEE 802.3 emissions requirements. The center tap of the transmit transformer should connect to VDDRUN, and the receive center tap should connect to a quiet 3.3 V supply via a ferrite bead - this improves EMI performance significantly.
Thông tin tuân thủ
RoHS and REACH compliant per Microchip product declaration. Lead-free TQFP (PT) termination. Industrial temperature grade -40 C to +85 C. AEC-Q100 not applicable - this is a microcontroller, not an automotive-grade IC; designers needing AEC-Q100 should consider PIC18F67J60-I/PT automotive variants or PIC32MX equivalents.