10AX090U3F45E2LG vs 10AX090U2F45E2LG 比較

詳細並排比較 10AX090U3F45E2LG 由 Intel 與 10AX090U2F45E2LG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 10AX090U3F45E2LG 10AX090U2F45E2LG
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Series Arria 10 GX —
Logic Elements (LE) 900,000 —
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Embedded Memory Bits 59,234,304 bits —
Number of Transceivers 48 transceiver macro channels (480 I/O references) —
Maximum Transceiver Data Rate [DATA_NEEDED: exact Gbps] —
Hard Memory Controllers Yes - DDR4, DDR3, QDR IV, RLDRAM 3 with hardened PHY —
Hard PCIe Controllers PCIe Gen3 x8 —
Hard Ethernet MACs 10GbE and 100GbE MACs —
Adaptive Logic Modules (ALMs) [DATA_NEEDED: ALM count] —
DSP Blocks [DATA_NEEDED: DSP block count] —
Number of I/O Banks [DATA_NEEDED: bank count] —
Maximum User I/O Pins 480 (per DigiKey listing) —
封裝 1932-BBGA, FCBGA 1932-ball FCBGA
Package Pin Pitch [DATA_NEEDED: pitch] —
Operating Temperature Grade OTHER / Extended (per Partstack listing) —
Process Technology 20nm TSMC 20nm
Configuration Method Serial (active/passive) and parallel via Quartus Prime Active serial, passive parallel, JTAG
RoHS 狀態 Compliant Compliant
Development Tool Intel Quartus Prime —
Family — Arria 10 GX
Logic Elements — 900,000
Embedded Memory — 59,234,304 bits
User I/O Pins — 480
Core Voltage — 0.9 V
Speed Grade — -2
Temperature Range — 0C to 100C (E2 - extended)
Transceiver Data Rate — Up to 14.1 Gbps
PCI Express Hard IP — Gen3 (hardened)
Memory Controllers — Gen2 hard memory controllers
MSL 等級 — 4 (per JEDEC J-STD-020)
Lead-Free / Halogen-Free — Yes / [DATA_NEEDED: halogen-free status]

資料表與資源

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