5CSEBA5U19C7N vs 5CSEBA5U19A7N 比較

詳細並排比較 5CSEBA5U19C7N 由 Intel 與 5CSEBA5U19A7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 5CSEBA5U19C7N 5CSEBA5U19A7N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Logic Elements 85,000 85,000
Hard Processor System Dual ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Frequency 800 MHz per core 700 MHz
封裝 484-UBGA (UBGAmobile, 19x19 mm) 484-pin UBG A (19x19 mm)
工作溫度 0C to +85C (commercial, junction) —
Speed Grade -7 (standard) —
Process Node 28 nm low-power (TSMC) —
Supply Voltage (Core) 1.1 V typical 1.1 V
DSP Blocks Variable-precision, 18x18 / 27x27 multipliers Variable-precision DSP blocks
Embedded Memory M10K + MLAB blocks, ~4,450 Kbits total —
HPS Peripherals EMAC, USB 2.0 OTG, NAND, DDR3, SPI, QSPI, I2C, UART —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS / Pb-free Yes —
Configuration Memory External (active serial via HPS or FPGA) —
MSL 等級 3 (per JEDEC J-STD-020, reflow 260C) —
Block Pins (User I/O) Approximately 66 user I/O pins —
Process Technology — 28 nm low-power
Hard Processor System (HPS) — Dual ARM Cortex-A9 MPCore with CoreSight
Operating Temperature Grade — Automotive (AEC-Q100) -40C to +125C
I/O Count — 66 (per source listing)
Memory Interface — DDR3 controller in HPS; external memory interface in FPGA fabric
Configuration / Boot Modes — NAND, QSPI, SD/MMC
RoHS 狀態 — Compliant (per Ampheo listing)
Automotive Qualification — AEC-Q100 (Automotive grade, indicated by 'A' in part number)

資料表與資源

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