A3P1000L-1FGG144 vs A3P400-2FGG144 比較
詳細並排比較 A3P1000L-1FGG144 由 Microchip Technology 與 A3P400-2FGG144 由 Microchip Technology. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
A3P1000L-1FGG144 - ProASIC3L Low Power Flash FPGA | Microchip
A3P1000L-1FGG144 ✓ 啟用中規格比較
| 參數 | A3P1000L-1FGG144 | A3P400-2FGG144 |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Logic Elements | 24576 | — |
| Equivalent System Gates | 1000000 | — |
| User I/O | 97 | — |
| Family | ProASIC3L (Flash*Freeze) | ProASIC3 |
| Core Supply Voltage Range | 1.14 V to 1.575 V | — |
| Core Voltage Options | 1.2 V to 1.5 V | — |
| Speed Grade | -1 | -2 |
| Configuration Memory | On-chip Flash (non-volatile, instant-on) | — |
| 工作溫度 | 0C to +85C (TJ) | [DATA_NEEDED: operating temperature range] |
| 封裝 | 144-LBGA / 144-FPBGA (13x13 mm) | 144-LBGA (FGG144) |
| 安裝類型 | Surface Mount | Surface Mount |
| Number of Registers | [DATA_NEEDED: number of registers] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM capacity] | — |
| PLLs | [DATA_NEEDED: number of PLLs] | — |
| Packaging | Tray | — |
| RoHS 狀態 | ROHS3 Compliant | Lead free (per Kynix listing) |
| Product Status | Active | — |
| Manufacturer Lead Time | 8 weeks | — |
| System Gates | — | 403000 |
| User I/Os | — | 97 |
| Embedded SRAM | — | 55296 bits (true dual-port) |
| Programming Technology | — | Nonvolatile Flash |
| Process Technology | — | 130 nm, 7-layer metal (6 copper) CMOS |
| Live at Power-Up | — | LAPU Level 0 |
| Configuration | — | Single-chip, no external boot ROM |
| Soft Processor Support | — | Optional soft ARM support |
| I/O Banks | — | 4 (independent VCCIBx supplies) |
| Reprogrammability | — | Yes (in-system reprogrammable flash) |
| 供應電壓 | — | [DATA_NEEDED: core supply voltage] |