AD677AD vs AD677JN 比較
詳細並排比較 AD677AD 由 Analog Devices 與 AD677JN 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | AD677AD | AD677JN |
|---|---|---|
| 品牌 | Analog Devices | Analog Devices |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 最後購買 | 最後購買 |
| 解析度 | 16 bit | 16 bit |
| 取樣率 | 100 kSPS | — |
| Total Conversion Time | 10 us | 10 µs |
| Input Count | 1 analog input | — |
| ADC Architecture | Successive-approximation-register (SAR) | — |
| Internal Architecture | Switched-capacitor charge redistribution | — |
| 輸出類型 | Serial | Serial output |
| Calibration | On-chip autocalibration with digital nonlinearity correction | — |
| 封裝 | 16-lead ceramic DIP (CDIP) | 16-pin narrow plastic DIP |
| 安裝類型 | Through-hole | Through-hole |
| 輸入電壓範圍 | [DATA_NEEDED: Input voltage range] | — |
| 參考電壓 | [DATA_NEEDED: External reference voltage] | — |
| Analog Input Type | [DATA_NEEDED: Unipolar or bipolar input configuration] | — |
| Integral Nonlinearity | [DATA_NEEDED: Integral nonlinearity] | — |
| SNR | [DATA_NEEDED: Signal-to-noise ratio] | — |
| Effective Number of Bits | [DATA_NEEDED: Effective number of bits] | — |
| Input Impedance | [DATA_NEEDED: Input impedance] | — |
| Input Sampling Capacitance | [DATA_NEEDED: Input sampling capacitance] | — |
| Digital Interface Levels | [DATA_NEEDED: Digital logic input and output levels] | — |
| Serial Clock Frequency | [DATA_NEEDED: Maximum serial clock frequency] | — |
| 工作溫度範圍 | [DATA_NEEDED: Operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Supply Voltage Range | [DATA_NEEDED: Supply voltage range] | — |
| Power Consumption | [DATA_NEEDED: Typical and maximum power consumption] | — |
| Package Dimensions | [DATA_NEEDED: Ceramic DIP package dimensions] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| Lead-Free Status | [DATA_NEEDED: Lead-free status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Conversion Rate | — | 100 kSPS |
| Architecture | — | Switched-capacitor / charge-redistribution ADC |
| Sample-and-Hold | — | On-chip sample-and-hold function |
| Missing Codes | — | No missing codes |
| Full-Power Bandwidth | — | 1 MHz |
| Total Harmonic Distortion | — | -99 dB |
| Signal-to-Noise Plus Distortion | — | 92 dB |
| Analog Supply | — | +5 V and +12 V |
| Digital Supply | — | VDD supply; exact operating value [DATA_NEEDED: VDD operating voltage range] |
| Typical Power Consumption, 10 V Reference | — | 450 mW during conversion |
| Typical Power Consumption, 5 V Reference | — | 360 mW during conversion |
| Ground Sensing | — | Remote analog-ground sense |
| Autocalibration | — | On-chip autocalibration |