AD7715ACHIPS-5 vs AD7715ACHIPS-3 比較

詳細並排比較 AD7715ACHIPS-5 由 Analog Devices 與 AD7715ACHIPS-3 由 Analog Devices. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Analog Devices
AD7715ACHIPS-3 AD7715ACHIPS-3 - 16-Bit Sigma-Delta ADC, 3V, 450uA | ADI

AD7715ACHIPS-3 - 16-Bit Sigma-Delta ADC, 3V, 450uA | ADI

AD7715ACHIPS-3 ✓ 啟用中

規格比較

參數 AD7715ACHIPS-5 AD7715ACHIPS-3
品牌 Analog Devices Analog Devices
類別 ADC/DAC ADC/DAC
生命週期狀態 NRND 啟用中
Architecture 16-bit sigma-delta ADC —
解析度 16 bits, no missing codes 16 bits
Number of Input Channels 1 differential / pseudo-differential —
供應電壓 3 V or 5 V nominal 3 V nominal (3 V variant; -5 variant operates at 5 V)
Total Supply Current 450 uA typical at 3 V supply —
Master Clock Frequency Up to 5 MHz at 5 V, up to 2.4576 MHz at 3 V —
On-chip PGA Yes, programmable gain (1 to 128) —
Input Range 20 mV to 2.5 V (gain-dependent, 5 V supply) —
Output Data Rate Programmable via digital filter first-notch (typ. 10 Hz to 1 kHz) —
Calibration Self-calibration and system-calibration modes On-chip self-calibration (zero-scale, full-scale)
Serial Interface SPI, QSPI, MICROWIRE, DSP-compatible 3-wire serial 3-wire SPI/QSPI/MICROWIRE compatible
封裝 Bare die (CHIPS) —
工作溫度 -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
RoHS 狀態 Compliant (per Analog Devices product page) [DATA_NEEDED: RoHS status for die form]
Lead-Free Yes (bare-die construction - consult factory) —
Number of Inputs — 1 differential
ADC Architecture — Sigma-Delta (charge balancing)
供應電流 — 450 uA max at 3 V / 1 MHz MCLK
Master Clock Range — 1 MHz typical (see datasheet)
Integral Nonlinearity (INL) — 0.0015%
Missing Codes — None (16 bits guaranteed)
Programmable Gains — 1, 2, 32, 128
Input Type — Differential analog input pair
Package Type — Bare die / CHIPS
Terminal Count — 16 (die pads)

資料表與資源

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