CDK2307AILP64 vs CDK2308AILP64 比較

詳細並排比較 CDK2307AILP64 由 Cadeka 與 CDK2308AILP64 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

MaxLinear
CDK2308AILP64 CDK2308AILP64 - Dual 10-bit 20MSPS ADC | Exar | QFN-64

CDK2308AILP64 - Dual 10-bit 20MSPS ADC | Exar | QFN-64

CDK2308AILP64 ✓ 啟用中

規格比較

參數 CDK2307AILP64 CDK2308AILP64
品牌 Cadeka MaxLinear
類別 ADC/DAC ADC/DAC
生命週期狀態 啟用中 啟用中
Manufacturer Cadeka Microcircuits (MaxLinear) Exar (MaxLinear)
Part Number CDK2307AILP64 CDK2308AILP64
Description Dual 12/13-bit 20/40/65/80 MSPS Analog-to-Digital Converter —
解析度 13 bit (12-bit option via CDK2308 family) 10 bit
Sampling Rate (this variant) 20 MSPS —
Sampling Rate (family max) 80 MSPS (CDK2307AILP64 = 20 MSPS grade) —
Number of Channels 2 (dual, simultaneous sampling) 2 (Dual)
Input Type Single-ended analog input Differential / Single-ended analog
Output Interface Parallel CMOS —
Core Supply Voltage 1.8 V —
I/O Supply Voltage 1.7 V to 3.6 V —
Power Dissipation 30 mW at 20 MSPS; 55/85/102 mW at 40/65/80 MSPS [DATA_NEEDED: power in mW]
Reference Internal (bandgap, integrated) —
封裝 64-pin QFN (LP64) with exposed pad, 9x9 mm 64-pin QFN (LP) 9x9 mm with exposed pad
安裝類型 Surface Mount Surface Mount
工作溫度 -40C to +85C (industrial) [DATA_NEEDED: exact temp grade] —
Pin Compatibility Pin-compatible with CDK2308 family (12-bit variant) —
RoHS 狀態 Compliant Compliant (per distributor listings)
Sampling Rate (Grade ILP64) — 20 MSPS
Family Maximum Sampling Rate — 80 MSPS (per family datasheet)
Architecture — Pipelined
Analog Supply Voltage — +3.3 V
Digital Supply Voltage — +3.3 V
Data Interface — Parallel CMOS / TTL
工作溫度範圍 — -40C to +85C (industrial)
Internal Reference — Yes (bandgap)
Input Bandwidth — [DATA_NEEDED: input bandwidth MHz]
INL (Integral Non-Linearity) — [DATA_NEEDED: INL in LSB]
DNL (Differential Non-Linearity) — [DATA_NEEDED: DNL in LSB]
SNR — [DATA_NEEDED: SNR dBFS]

資料表與資源

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