EP1810GI-45 vs EP1810GC-35 比較
詳細並排比較 EP1810GI-45 由 Altera 與 EP1810GC-35 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1810GI-45 | EP1810GC-35 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | 16 |
| Flip-Flops | 48 | — |
| Propagation Delay (tpd) | 45 ns | — |
| Speed Grade | -45 | — |
| Technology | CMOS | CMOS, UV-erasable EPROM cells |
| Package Type | Ceramic Pin Grid Array with UV window | — |
| 腳位數 | 68 | — |
| 安裝類型 | Through-Hole | Through Hole |
| Programmable | Yes (UV-erasable, electrically programmable) | — |
| RoHS 狀態 | Non-compliant (ceramic PGA) | Not applicable (legacy ceramic package) |
| Lead-Free | No | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| 供應電壓 | [DATA_NEEDED: VCC range] | [DATA_NEEDED: VCC range] |
| Logic Family | — | Altera Classic EPLD |
| 封裝 | — | CPGA-68 (Ceramic Pin Grid Array, 68-pin) |
| 腳位數 | — | 68 |
| Propagation Delay (tpd max) | — | 40 ns |
| Maximum Inputs | — | 64 |
| Maximum Outputs | — | 48 |
| I/O Standard | — | TTL-compatible |
| Programming Method | — | UV erasure + EPROM programming |
| Lead-Free Status | — | Not applicable |
| Manufacturer (current source) | — | Rochester Electronics (authorized Altera EPLD partner) |
| Original Manufacturer | — | Altera Corporation (now Intel FPGA) |