EP1K30TI144-2 vs EP1K30TI144-3N 比較

詳細並排比較 EP1K30TI144-2 由 Intel 與 EP1K30TI144-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1K30TI144-2 EP1K30TI144-3N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Family ACEX-1K ACEX 1K
Series EP1K30 EP1K30
Logic Elements / Cells 1728 —
Total RAM Bits 24576 —
Number of Logic Array Blocks (LABs) 216 —
Equivalent Gates 30,000 —
User I/O Count 102 —
Number of I/O Banks 4 —
Supply Voltage - Core 2.5 V (2.375 V min, 2.625 V max) —
Supply Voltage - I/O 2.5 V / 3.3 V / 5.0 V (multiVolt) —
Maximum Internal Frequency 200 MHz —
Process Technology 0.22 µm CMOS, SRAM-based 0.18 um CMOS, 4 metal layers
Embedded Memory Type Dual-port EAB (Embedded Array Block) —
封裝 144-LQFP (TQFP), 22 mm × 22 mm, 0.5 mm pitch TQFP-144 (0.5 mm pitch)
工作溫度 -40 °C to +85 °C (Industrial, "I" suffix) -40C to +85C (Industrial)
Speed Grade -2 (mid-tier) -3 (fastest in EP1K30 family)
Configuration Method SRAM, requires external configuration PROM (EPC) —
Programming Interface JTAG (IEEE 1149.1) / IEEE 1532 ISP —
安裝類型 Surface Mount Surface Mount (Gull-Wing)
RoHS 狀態 [DATA_NEEDED: RoHS compliance - legacy part] [DATA_NEEDED: RoHS status]
Logic Elements — 1,728
Typical Gates — 30,000
Usable Gates — 17,500
Embedded Memory (EAB) — 24 Kbit (6 EABs of 4 Kbit each)
Maximum User I/O Pins — 102
Dedicated Input Pins — 6
Total Terminals — 144
Core Supply Voltage — 2.5 V nominal (2.375 V min, 2.625 V max)
Configuration Modes — Passive Serial, Passive Parallel Async, Passive Parallel Sync, JTAG (IEEE 1149.1)
PLLs — 4
Thermal Resistance (theta_JA) — Approximately 35-40 C/W (PCB-dependent)

資料表與資源

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