EP1M120F484I6M vs EP1M120F484C7N 比較
詳細並排比較 EP1M120F484I6M 由 Altera 與 EP1M120F484C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1M120F484I6M | EP1M120F484C7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Mercury (EP1M) | Altera Mercury |
| Logic Elements | 120,000 | — |
| System Gates | 480,000 (typical) | 120,000 |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | 484-ball FineLine BGA (FCBGA) |
| Package Code | BGA, 484 balls, Fine-pitch | F484 |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Temperature Grade | Industrial | — |
| Speed Grade | -6 (slowest Mercury timing bin) | 7 |
| 供應電壓 | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| RoHS 狀態 | Compliant (M revision) | — |
| Logic Elements / Cells | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| Embedded Memory (RAM bits) | — | 49,152 |
| Maximum User I/O Pins | — | 303 |
| Logic Family | — | CMOS |
| Core Supply Voltage | — | 1.8 V |
| Integrated Transceivers | — | Yes - CDR to 1.25 Gbps |
| 工作溫度 | — | 0°C to 85°C (Commercial) |
| Temperature Grade Suffix | — | C (Commercial, 0–85°C) |
| RoHS / Lead-Free Suffix | — | N (lead-free) |
| Process Node | — | [DATA_NEEDED: process node] |
| Transceiver Channels | — | [DATA_NEEDED: number of transceiver channels] |